This is the 4.9.203 stable release

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Merge 4.9.203 into android-4.9-q

Changes in 4.9.203
	ax88172a: fix information leak on short answers
	slip: Fix memory leak in slip_open error path
	ALSA: usb-audio: Fix missing error check at mixer resolution test
	ALSA: usb-audio: not submit urb for stopped endpoint
	Input: ff-memless - kill timer in destroy()
	Input: synaptics-rmi4 - fix video buffer size
	Input: synaptics-rmi4 - clear IRQ enables for F54
	Input: synaptics-rmi4 - destroy F54 poller workqueue when removing
	IB/hfi1: Ensure full Gen3 speed in a Gen4 system
	ecryptfs_lookup_interpose(): lower_dentry->d_inode is not stable
	ecryptfs_lookup_interpose(): lower_dentry->d_parent is not stable either
	iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros
	mm: memcg: switch to css_tryget() in get_mem_cgroup_from_mm()
	mm: hugetlb: switch to css_tryget() in hugetlb_cgroup_charge_cgroup()
	mmc: sdhci-of-at91: fix quirk2 overwrite
	ath10k: fix kernel panic by moving pci flush after napi_disable
	iio: dac: mcp4922: fix error handling in mcp4922_write_raw
	ALSA: pcm: signedness bug in snd_pcm_plug_alloc()
	arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply
	ARM: dts: at91/trivial: Fix USART1 definition for at91sam9g45
	cfg80211: Avoid regulatory restore when COUNTRY_IE_IGNORE is set
	ALSA: seq: Do error checks at creating system ports
	ath9k: fix tx99 with monitor mode interface
	gfs2: Don't set GFS2_RDF_UPTODATE when the lvb is updated
	ASoC: dpcm: Properly initialise hw->rate_max
	MIPS: BCM47XX: Enable USB power on Netgear WNDR3400v3
	ARM: dts: exynos: Fix sound in Snow-rev5 Chromebook
	ARM: dts: exynos: Fix regulators configuration on Peach Pi/Pit Chromebooks
	i40e: use correct length for strncpy
	i40e: hold the rtnl lock on clearing interrupt scheme
	i40e: Prevent deleting MAC address from VF when set by PF
	IB/rxe: fixes for rdma read retry
	iwlwifi: mvm: avoid sending too many BARs
	ARM: dts: pxa: fix power i2c base address
	rtl8187: Fix warning generated when strncpy() destination length matches the sixe argument
	net: lan78xx: Bail out if lan78xx_get_endpoints fails
	ASoC: sgtl5000: avoid division by zero if lo_vag is zero
	ARM: dts: exynos: Disable pull control for S5M8767 PMIC
	ath10k: wmi: disable softirq's while calling ieee80211_rx
	mips: txx9: fix iounmap related issue
	ASoC: Intel: hdac_hdmi: Limit sampling rates at dai creation
	of: make PowerMac cache node search conditional on CONFIG_PPC_PMAC
	ARM: dts: omap3-gta04: give spi_lcd node a label so that we can overwrite in other DTS files
	ARM: dts: omap3-gta04: fixes for tvout / venc
	ARM: dts: omap3-gta04: tvout: enable as display1 alias
	ARM: dts: omap3-gta04: fix touchscreen tsc2007
	ARM: dts: omap3-gta04: make NAND partitions compatible with recent U-Boot
	ARM: dts: omap3-gta04: keep vpll2 always on
	dmaengine: dma-jz4780: Don't depend on MACH_JZ4780
	dmaengine: dma-jz4780: Further residue status fix
	ath9k: add back support for using active monitor interfaces for tx99
	signal: Always ignore SIGKILL and SIGSTOP sent to the global init
	signal: Properly deliver SIGILL from uprobes
	signal: Properly deliver SIGSEGV from x86 uprobes
	f2fs: fix memory leak of percpu counter in fill_super()
	scsi: sym53c8xx: fix NULL pointer dereference panic in sym_int_sir()
	ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set
	scsi: pm80xx: Corrected dma_unmap_sg() parameter
	scsi: pm80xx: Fixed system hang issue during kexec boot
	kprobes: Don't call BUG_ON() if there is a kprobe in use on free list
	nvmem: core: return error code instead of NULL from nvmem_device_get
	media: fix: media: pci: meye: validate offset to avoid arbitrary access
	media: dvb: fix compat ioctl translation
	ALSA: intel8x0m: Register irq handler after register initializations
	pinctrl: at91-pio4: fix has_config check in atmel_pctl_dt_subnode_to_map()
	llc: avoid blocking in llc_sap_close()
	ARM: dts: qcom: ipq4019: fix cpu0's qcom,saw2 reg value
	powerpc/vdso: Correct call frame information
	ARM: dts: socfpga: Fix I2C bus unit-address error
	pinctrl: at91: don't use the same irqchip with multiple gpiochips
	cxgb4: Fix endianness issue in t4_fwcache()
	power: supply: ab8500_fg: silence uninitialized variable warnings
	power: reset: at91-poweroff: do not procede if at91_shdwc is allocated
	power: supply: max8998-charger: Fix platform data retrieval
	component: fix loop condition to call unbind() if bind() fails
	kernfs: Fix range checks in kernfs_get_target_path
	ip_gre: fix parsing gre header in ipgre_err
	ARM: dts: rockchip: Fix erroneous SPI bus dtc warnings on rk3036
	ath9k: Fix a locking bug in ath9k_add_interface()
	s390/qeth: invoke softirqs after napi_schedule()
	PCI/ACPI: Correct error message for ASPM disabling
	serial: mxs-auart: Fix potential infinite loop
	powerpc/iommu: Avoid derefence before pointer check
	powerpc/64s/hash: Fix stab_rr off by one initialization
	powerpc/pseries: Disable CPU hotplug across migrations
	RDMA/i40iw: Fix incorrect iterator type
	libfdt: Ensure INT_MAX is defined in libfdt_env.h
	power: supply: twl4030_charger: fix charging current out-of-bounds
	power: supply: twl4030_charger: disable eoc interrupt on linear charge
	net: toshiba: fix return type of ndo_start_xmit function
	net: xilinx: fix return type of ndo_start_xmit function
	net: broadcom: fix return type of ndo_start_xmit function
	net: amd: fix return type of ndo_start_xmit function
	usb: chipidea: imx: enable OTG overcurrent in case USB subsystem is already started
	usb: chipidea: Fix otg event handler
	mlxsw: spectrum: Init shaper for TCs 8..15
	ARM: dts: am335x-evm: fix number of cpsw
	f2fs: fix to recover inode's uid/gid during POR
	ARM: dts: ux500: Correct SCU unit address
	ARM: dts: ux500: Fix LCDA clock line muxing
	ARM: dts: ste: Fix SPI controller node names
	spi: pic32: Use proper enum in dmaengine_prep_slave_rg
	cpufeature: avoid warning when compiling with clang
	ARM: dts: marvell: Fix SPI and I2C bus warnings
	bnx2x: Ignore bandwidth attention in single function mode
	net: micrel: fix return type of ndo_start_xmit function
	x86/CPU: Use correct macros for Cyrix calls
	MIPS: kexec: Relax memory restriction
	media: pci: ivtv: Fix a sleep-in-atomic-context bug in ivtv_yuv_init()
	media: au0828: Fix incorrect error messages
	media: davinci: Fix implicit enum conversion warning
	usb: gadget: uvc: configfs: Drop leaked references to config items
	usb: gadget: uvc: configfs: Prevent format changes after linking header
	phy: phy-twl4030-usb: fix denied runtime access
	usb: gadget: uvc: Factor out video USB request queueing
	usb: gadget: uvc: Only halt video streaming endpoint in bulk mode
	coresight: Fix handling of sinks
	coresight: etm4x: Configure EL2 exception level when kernel is running in HYP
	coresight: tmc: Fix byte-address alignment for RRP
	misc: kgdbts: Fix restrict error
	misc: genwqe: should return proper error value.
	vfio/pci: Fix potential memory leak in vfio_msi_cap_len
	vfio/pci: Mask buggy SR-IOV VF INTx support
	scsi: libsas: always unregister the old device if going to discover new
	ARM: dts: tegra30: fix xcvr-setup-use-fuses
	ARM: tegra: apalis_t30: fix mmc1 cmd pull-up
	ARM: dts: paz00: fix wakeup gpio keycode
	net: smsc: fix return type of ndo_start_xmit function
	EDAC: Raise the maximum number of memory controllers
	ARM: dts: realview: Fix SPI controller node names
	Bluetooth: L2CAP: Detect if remote is not able to use the whole MPS
	crypto: s5p-sss: Fix Fix argument list alignment
	crypto: fix a memory leak in rsa-kcs1pad's encryption mode
	scsi: NCR5380: Clear all unissued commands on host reset
	scsi: NCR5380: Use DRIVER_SENSE to indicate valid sense data
	scsi: NCR5380: Check for invalid reselection target
	scsi: NCR5380: Don't clear busy flag when abort fails
	scsi: NCR5380: Don't call dsprintk() following reselection interrupt
	scsi: NCR5380: Handle BUS FREE during reselection
	arm64: dts: amd: Fix SPI bus warnings
	arm64: dts: lg: Fix SPI controller node names
	ARM: dts: lpc32xx: Fix SPI controller node names
	usb: xhci-mtk: fix ISOC error when interval is zero
	fuse: use READ_ONCE on congestion_threshold and max_background
	IB/iser: Fix possible NULL deref at iser_inv_desc()
	memfd: Use radix_tree_deref_slot_protected to avoid the warning.
	slcan: Fix memory leak in error path
	net: cdc_ncm: Signedness bug in cdc_ncm_set_dgram_size()
	x86/atomic: Fix smp_mb__{before,after}_atomic()
	kprobes/x86: Prohibit probing on exception masking instructions
	uprobes/x86: Prohibit probing on MOV SS instruction
	fbdev: Ditch fb_edid_add_monspecs
	block: introduce blk_rq_is_passthrough
	libata: have ata_scsi_rw_xlat() fail invalid passthrough requests
	net: ovs: fix return type of ndo_start_xmit function
	net: xen-netback: fix return type of ndo_start_xmit function
	ARM: dts: omap5: enable OTG role for DWC3 controller
	f2fs: return correct errno in f2fs_gc
	SUNRPC: Fix priority queue fairness
	kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table
	arm64/numa: Report correct memblock range for the dummy node
	ath10k: fix vdev-start timeout on error
	ata: ahci_brcm: Allow using driver or DSL SoCs
	ath9k: fix reporting calculated new FFT upper max
	usb: gadget: udc: fotg210-udc: Fix a sleep-in-atomic-context bug in fotg210_get_status()
	nl80211: Fix a GET_KEY reply attribute
	dmaengine: ep93xx: Return proper enum in ep93xx_dma_chan_direction
	dmaengine: timb_dma: Use proper enum in td_prep_slave_sg
	mei: samples: fix a signedness bug in amt_host_if_call()
	cxgb4: Use proper enum in cxgb4_dcb_handle_fw_update
	cxgb4: Use proper enum in IEEE_FAUX_SYNC
	powerpc/pseries: Fix DTL buffer registration
	powerpc/pseries: Fix how we iterate over the DTL entries
	mtd: rawnand: sh_flctl: Use proper enum for flctl_dma_fifo0_transfer
	ixgbe: Fix crash with VFs and flow director on interface flap
	IB/mthca: Fix error return code in __mthca_init_one()
	IB/mlx4: Avoid implicit enumerated type conversion
	ACPICA: Never run _REG on system_memory and system_IO
	ata: ep93xx: Use proper enums for directions
	media: pxa_camera: Fix check for pdev->dev.of_node
	ALSA: hda/sigmatel - Disable automute for Elo VuPoint
	KVM: PPC: Book3S PR: Exiting split hack mode needs to fixup both PC and LR
	USB: serial: cypress_m8: fix interrupt-out transfer length
	mtd: physmap_of: Release resources on error
	cpu/SMT: State SMT is disabled even with nosmt and without "=force"
	brcmfmac: reduce timeout for action frame scan
	brcmfmac: fix full timeout waiting for action frame on-channel tx
	clk: samsung: Use clk_hw API for calling clk framework from clk notifiers
	i2c: brcmstb: Allow enabling the driver on DSL SoCs
	NFSv4.x: fix lock recovery during delegation recall
	dmaengine: ioat: fix prototype of ioat_enumerate_channels
	Input: st1232 - set INPUT_PROP_DIRECT property
	Input: silead - try firmware reload after unsuccessful resume
	x86/olpc: Fix build error with CONFIG_MFD_CS5535=m
	crypto: mxs-dcp - Fix SHA null hashes and output length
	crypto: mxs-dcp - Fix AES issues
	ACPI / SBS: Fix rare oops when removing modules
	iwlwifi: mvm: don't send keys when entering D3
	fbdev: sbuslib: use checked version of put_user()
	fbdev: sbuslib: integer overflow in sbusfb_ioctl_helper()
	reset: Fix potential use-after-free in __of_reset_control_get()
	bcache: recal cached_dev_sectors on detach
	s390/kasan: avoid vdso instrumentation
	proc/vmcore: Fix i386 build error of missing copy_oldmem_page_encrypted()
	backlight: lm3639: Unconditionally call led_classdev_unregister
	mfd: ti_am335x_tscadc: Keep ADC interface on if child is wakeup capable
	printk: Give error on attempt to set log buffer length to over 2G
	media: isif: fix a NULL pointer dereference bug
	GFS2: Flush the GFS2 delete workqueue before stopping the kernel threads
	media: cx231xx: fix potential sign-extension overflow on large shift
	x86/kexec: Correct KEXEC_BACKUP_SRC_END off-by-one error
	gpio: syscon: Fix possible NULL ptr usage
	spi: spidev: Fix OF tree warning logic
	ARM: 8802/1: Call syscall_trace_exit even when system call skipped
	orangefs: rate limit the client not running info message
	hwmon: (pwm-fan) Silence error on probe deferral
	hwmon: (ina3221) Fix INA3221_CONFIG_MODE macros
	misc: cxl: Fix possible null pointer dereference
	mac80211: minstrel: fix CCK rate group streams value
	spi: rockchip: initialize dma_slave_config properly
	ARM: dts: omap5: Fix dual-role mode on Super-Speed port
	arm64: uaccess: Ensure PAN is re-enabled after unhandled uaccess fault
	Linux 4.9.203

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman 2019-11-25 10:11:00 +01:00
commit 13ff5130ff
253 changed files with 1335 additions and 746 deletions

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@ -1,6 +1,6 @@
VERSION = 4 VERSION = 4
PATCHLEVEL = 9 PATCHLEVEL = 9
SUBLEVEL = 202 SUBLEVEL = 203
EXTRAVERSION = EXTRAVERSION =
NAME = Roaring Lionus NAME = Roaring Lionus

View File

@ -5,6 +5,8 @@
#include <linux/string.h> #include <linux/string.h>
#include <asm/byteorder.h> #include <asm/byteorder.h>
#define INT_MAX ((int)(~0U>>1))
typedef __be16 fdt16_t; typedef __be16 fdt16_t;
typedef __be32 fdt32_t; typedef __be32 fdt32_t;
typedef __be64 fdt64_t; typedef __be64 fdt64_t;

View File

@ -701,6 +701,7 @@
pinctrl-0 = <&cpsw_default>; pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>; pinctrl-1 = <&cpsw_sleep>;
status = "okay"; status = "okay";
slaves = <1>;
}; };
&davinci_mdio { &davinci_mdio {
@ -708,15 +709,14 @@
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
}; };

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@ -334,7 +334,7 @@
clock-names = "uartclk", "apb_pclk"; clock-names = "uartclk", "apb_pclk";
}; };
ssp: ssp@1000d000 { ssp: spi@1000d000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x1000d000 0x1000>; reg = <0x1000d000 0x1000>;
clocks = <&sspclk>, <&pclk>; clocks = <&sspclk>, <&pclk>;

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@ -343,7 +343,7 @@
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
pb1176_ssp: ssp@1010b000 { pb1176_ssp: spi@1010b000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x1010b000 0x1000>; reg = <0x1010b000 0x1000>;
interrupt-parent = <&intc_dc1176>; interrupt-parent = <&intc_dc1176>;

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@ -480,7 +480,7 @@
clock-names = "uartclk", "apb_pclk"; clock-names = "uartclk", "apb_pclk";
}; };
ssp@1000d000 { spi@1000d000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x1000d000 0x1000>; reg = <0x1000d000 0x1000>;
interrupt-parent = <&intc_pb11mp>; interrupt-parent = <&intc_pb11mp>;

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@ -318,7 +318,7 @@
clock-names = "uartclk", "apb_pclk"; clock-names = "uartclk", "apb_pclk";
}; };
ssp: ssp@1000d000 { ssp: spi@1000d000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x1000d000 0x1000>; reg = <0x1000d000 0x1000>;
clocks = <&sspclk>, <&pclk>; clocks = <&sspclk>, <&pclk>;

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@ -546,7 +546,7 @@
}; };
}; };
uart1 { usart1 {
pinctrl_usart1: usart1-0 { pinctrl_usart1: usart1-0 {
atmel,pins = atmel,pins =
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */ <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */

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@ -86,7 +86,7 @@
status = "okay"; status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
si5351: clock-generator { si5351: clock-generator@60 {
compatible = "silabs,si5351a-msop"; compatible = "silabs,si5351a-msop";
reg = <0x60>; reg = <0x60>;
#address-cells = <1>; #address-cells = <1>;

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@ -152,7 +152,7 @@
0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */ 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */
0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */ 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */
spi0: spi-ctrl@10600 { spi0: spi@10600 {
compatible = "marvell,orion-spi"; compatible = "marvell,orion-spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -165,7 +165,7 @@
status = "disabled"; status = "disabled";
}; };
i2c: i2c-ctrl@11000 { i2c: i2c@11000 {
compatible = "marvell,mv64xxx-i2c"; compatible = "marvell,mv64xxx-i2c";
reg = <0x11000 0x20>; reg = <0x11000 0x20>;
#address-cells = <1>; #address-cells = <1>;
@ -215,7 +215,7 @@
status = "disabled"; status = "disabled";
}; };
spi1: spi-ctrl@14600 { spi1: spi@14600 {
compatible = "marvell,orion-spi"; compatible = "marvell,orion-spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

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@ -170,6 +170,8 @@
reg = <0x66>; reg = <0x66>;
interrupt-parent = <&gpx3>; interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&s5m8767_irq>;
vinb1-supply = <&main_dc_reg>; vinb1-supply = <&main_dc_reg>;
vinb2-supply = <&main_dc_reg>; vinb2-supply = <&main_dc_reg>;
@ -547,6 +549,13 @@
cap-sd-highspeed; cap-sd-highspeed;
}; };
&pinctrl_0 {
s5m8767_irq: s5m8767-irq {
samsung,pins = "gpx3-2";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
};
&rtc { &rtc {
status = "okay"; status = "okay";
}; };

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@ -23,6 +23,14 @@
samsung,model = "Snow-I2S-MAX98090"; samsung,model = "Snow-I2S-MAX98090";
samsung,audio-codec = <&max98090>; samsung,audio-codec = <&max98090>;
cpu {
sound-dai = <&i2s0 0>;
};
codec {
sound-dai = <&max98090 0>, <&hdmi>;
};
}; };
}; };
@ -34,6 +42,9 @@
interrupt-parent = <&gpx0>; interrupt-parent = <&gpx0>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&max98090_irq>; pinctrl-0 = <&max98090_irq>;
clocks = <&pmu_system_controller 0>;
clock-names = "mclk";
#sound-dai-cells = <1>;
}; };
}; };

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@ -302,6 +302,7 @@
regulator-name = "vdd_1v35"; regulator-name = "vdd_1v35";
regulator-min-microvolt = <1350000>; regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>; regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-state-mem { regulator-state-mem {
regulator-on-in-suspend; regulator-on-in-suspend;
@ -323,6 +324,7 @@
regulator-name = "vdd_2v"; regulator-name = "vdd_2v";
regulator-min-microvolt = <2000000>; regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>; regulator-max-microvolt = <2000000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-state-mem { regulator-state-mem {
regulator-on-in-suspend; regulator-on-in-suspend;
@ -333,6 +335,7 @@
regulator-name = "vdd_1v8"; regulator-name = "vdd_1v8";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-state-mem { regulator-state-mem {
regulator-on-in-suspend; regulator-on-in-suspend;

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@ -302,6 +302,7 @@
regulator-name = "vdd_1v35"; regulator-name = "vdd_1v35";
regulator-min-microvolt = <1350000>; regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>; regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-state-mem { regulator-state-mem {
regulator-on-in-suspend; regulator-on-in-suspend;
@ -323,6 +324,7 @@
regulator-name = "vdd_2v"; regulator-name = "vdd_2v";
regulator-min-microvolt = <2000000>; regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>; regulator-max-microvolt = <2000000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-state-mem { regulator-state-mem {
regulator-on-in-suspend; regulator-on-in-suspend;
@ -333,6 +335,7 @@
regulator-name = "vdd_1v8"; regulator-name = "vdd_1v8";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-state-mem { regulator-state-mem {
regulator-on-in-suspend; regulator-on-in-suspend;

View File

@ -179,7 +179,7 @@
* ssp0 and spi1 are shared pins; * ssp0 and spi1 are shared pins;
* enable one in your board dts, as needed. * enable one in your board dts, as needed.
*/ */
ssp0: ssp@20084000 { ssp0: spi@20084000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x20084000 0x1000>; reg = <0x20084000 0x1000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
@ -199,7 +199,7 @@
* ssp1 and spi2 are shared pins; * ssp1 and spi2 are shared pins;
* enable one in your board dts, as needed. * enable one in your board dts, as needed.
*/ */
ssp1: ssp@2008c000 { ssp1: spi@2008c000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x2008c000 0x1000>; reg = <0x2008c000 0x1000>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;

View File

@ -28,6 +28,7 @@
aliases { aliases {
display0 = &lcd; display0 = &lcd;
display1 = &tv0;
}; };
gpio-keys { gpio-keys {
@ -70,7 +71,7 @@
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
}; };
spi_lcd { spi_lcd: spi_lcd {
compatible = "spi-gpio"; compatible = "spi-gpio";
#address-cells = <0x1>; #address-cells = <0x1>;
#size-cells = <0x0>; #size-cells = <0x0>;
@ -122,7 +123,7 @@
}; };
tv0: connector { tv0: connector {
compatible = "svideo-connector"; compatible = "composite-video-connector";
label = "tv"; label = "tv";
port { port {
@ -134,7 +135,7 @@
tv_amp: opa362 { tv_amp: opa362 {
compatible = "ti,opa362"; compatible = "ti,opa362";
enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; /* GPIO_23 to enable video out amplifier */
ports { ports {
#address-cells = <1>; #address-cells = <1>;
@ -273,6 +274,13 @@
OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */ OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */
>; >;
}; };
penirq_pins: pinmux_penirq_pins {
pinctrl-single,pins = <
/* here we could enable to wakeup the cpu from suspend by a pen touch */
OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio160 */
>;
};
}; };
&omap3_pmx_core2 { &omap3_pmx_core2 {
@ -410,10 +418,19 @@
tsc2007@48 { tsc2007@48 {
compatible = "ti,tsc2007"; compatible = "ti,tsc2007";
reg = <0x48>; reg = <0x48>;
pinctrl-names = "default";
pinctrl-0 = <&penirq_pins>;
interrupt-parent = <&gpio6>; interrupt-parent = <&gpio6>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */ interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* GPIO_160 */
ti,x-plate-ohms = <600>; ti,x-plate-ohms = <600>;
touchscreen-size-x = <480>;
touchscreen-size-y = <640>;
touchscreen-max-pressure = <1000>;
touchscreen-fuzz-x = <3>;
touchscreen-fuzz-y = <8>;
touchscreen-fuzz-pressure = <10>;
touchscreen-inverted-y;
}; };
/* RFID EEPROM */ /* RFID EEPROM */
@ -519,6 +536,12 @@
regulator-max-microvolt = <3150000>; regulator-max-microvolt = <3150000>;
}; };
/* Needed to power the DPI pins */
&vpll2 {
regulator-always-on;
};
&dss { &dss {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = < &dss_dpi_pins >; pinctrl-0 = < &dss_dpi_pins >;
@ -539,10 +562,14 @@
vdda-supply = <&vdac>; vdda-supply = <&vdac>;
#address-cells = <1>;
#size-cells = <0>;
port { port {
reg = <0>;
venc_out: endpoint { venc_out: endpoint {
remote-endpoint = <&opa_in>; remote-endpoint = <&opa_in>;
ti,channels = <2>; ti,channels = <1>;
ti,invert-polarity; ti,invert-polarity;
}; };
}; };
@ -586,22 +613,22 @@
bootloaders@80000 { bootloaders@80000 {
label = "U-Boot"; label = "U-Boot";
reg = <0x80000 0x1e0000>; reg = <0x80000 0x1c0000>;
}; };
bootloaders_env@260000 { bootloaders_env@240000 {
label = "U-Boot Env"; label = "U-Boot Env";
reg = <0x260000 0x20000>; reg = <0x240000 0x40000>;
}; };
kernel@280000 { kernel@280000 {
label = "Kernel"; label = "Kernel";
reg = <0x280000 0x400000>; reg = <0x280000 0x600000>;
}; };
filesystem@680000 { filesystem@880000 {
label = "File System"; label = "File System";
reg = <0x680000 0xf980000>; reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */
}; };
}; };
}; };

View File

@ -694,6 +694,11 @@
vbus-supply = <&smps10_out1_reg>; vbus-supply = <&smps10_out1_reg>;
}; };
&dwc3 {
extcon = <&extcon_usb3>;
dr_mode = "otg";
};
&mcspi1 { &mcspi1 {
}; };

View File

@ -156,7 +156,7 @@
&i2c { &i2c {
status = "okay"; status = "okay";
rtc { rtc@32 {
compatible = "ricoh,rs5c372a"; compatible = "ricoh,rs5c372a";
reg = <0x32>; reg = <0x32>;
}; };

View File

@ -70,7 +70,7 @@
clocks = <&clks CLK_PWM1>; clocks = <&clks CLK_PWM1>;
}; };
pwri2c: i2c@40f000180 { pwri2c: i2c@40f00180 {
compatible = "mrvl,pxa-i2c"; compatible = "mrvl,pxa-i2c";
reg = <0x40f00180 0x24>; reg = <0x40f00180 0x24>;
interrupts = <6>; interrupts = <6>;

View File

@ -211,7 +211,7 @@
saw0: regulator@b089000 { saw0: regulator@b089000 {
compatible = "qcom,saw2"; compatible = "qcom,saw2";
reg = <0x02089000 0x1000>, <0x0b009000 0x1000>; reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
regulator; regulator;
}; };

View File

@ -744,7 +744,7 @@
/* no rts / cts for uart2 */ /* no rts / cts for uart2 */
}; };
spi { spi-pins {
spi_txd:spi-txd { spi_txd:spi-txd {
rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>; rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
}; };

View File

@ -88,7 +88,7 @@
status = "okay"; status = "okay";
speed-mode = <0>; speed-mode = <0>;
adxl345: adxl345@0 { adxl345: adxl345@53 {
compatible = "adi,adxl345"; compatible = "adi,adxl345";
reg = <0x53>; reg = <0x53>;

View File

@ -188,7 +188,7 @@
<0xa0410100 0x100>; <0xa0410100 0x100>;
}; };
scu@a04100000 { scu@a0410000 {
compatible = "arm,cortex-a9-scu"; compatible = "arm,cortex-a9-scu";
reg = <0xa0410000 0x100>; reg = <0xa0410000 0x100>;
}; };
@ -864,7 +864,7 @@
power-domains = <&pm_domains DOMAIN_VAPE>; power-domains = <&pm_domains DOMAIN_VAPE>;
}; };
ssp@80002000 { spi@80002000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x80002000 0x1000>; reg = <0x80002000 0x1000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@ -878,7 +878,7 @@
power-domains = <&pm_domains DOMAIN_VAPE>; power-domains = <&pm_domains DOMAIN_VAPE>;
}; };
ssp@80003000 { spi@80003000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x80003000 0x1000>; reg = <0x80003000 0x1000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;

View File

@ -607,16 +607,20 @@
mcde { mcde {
lcd_default_mode: lcd_default { lcd_default_mode: lcd_default {
default_mux { default_mux1 {
/* Mux in VSI0 and all the data lines */ /* Mux in VSI0 and all the data lines */
function = "lcd"; function = "lcd";
groups = groups =
"lcdvsi0_a_1", /* VSI0 for LCD */ "lcdvsi0_a_1", /* VSI0 for LCD */
"lcd_d0_d7_a_1", /* Data lines */ "lcd_d0_d7_a_1", /* Data lines */
"lcd_d8_d11_a_1", /* TV-out */ "lcd_d8_d11_a_1", /* TV-out */
"lcdaclk_b_1", /* Clock line for TV-out */
"lcdvsi1_a_1"; /* VSI1 for HDMI */ "lcdvsi1_a_1"; /* VSI1 for HDMI */
}; };
default_mux2 {
function = "lcda";
groups =
"lcdaclk_b_1"; /* Clock line for TV-out */
};
default_cfg1 { default_cfg1 {
pins = pins =
"GPIO68_E1", /* VSI0 */ "GPIO68_E1", /* VSI0 */

View File

@ -57,7 +57,7 @@
}; };
}; };
ssp@80002000 { spi@80002000 {
/* /*
* On the first generation boards, this SSP/SPI port was connected * On the first generation boards, this SSP/SPI port was connected
* to the AB8500. * to the AB8500.

View File

@ -386,7 +386,7 @@
pinctrl-1 = <&i2c3_sleep_mode>; pinctrl-1 = <&i2c3_sleep_mode>;
}; };
ssp@80002000 { spi@80002000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&ssp0_snowball_mode>; pinctrl-0 = <&ssp0_snowball_mode>;
}; };

View File

@ -441,7 +441,7 @@
dma-names = "rx"; dma-names = "rx";
}; };
spi: ssp@c0006000 { spi: spi@c0006000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0xc0006000 0x1000>; reg = <0xc0006000 0x1000>;
interrupt-parent = <&vica>; interrupt-parent = <&vica>;

View File

@ -521,10 +521,10 @@
gpio-keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
power { wakeup {
label = "Power"; label = "Wakeup";
gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>; gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>; linux,code = <KEY_WAKEUP>;
wakeup-source; wakeup-source;
}; };
}; };

View File

@ -147,14 +147,14 @@
/* Apalis MMC1 */ /* Apalis MMC1 */
sdmmc3_clk_pa6 { sdmmc3_clk_pa6 {
nvidia,pins = "sdmmc3_clk_pa6", nvidia,pins = "sdmmc3_clk_pa6";
"sdmmc3_cmd_pa7";
nvidia,function = "sdmmc3"; nvidia,function = "sdmmc3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_DISABLE>;
}; };
sdmmc3_dat0_pb7 { sdmmc3_dat0_pb7 {
nvidia,pins = "sdmmc3_dat0_pb7", nvidia,pins = "sdmmc3_cmd_pa7",
"sdmmc3_dat0_pb7",
"sdmmc3_dat1_pb6", "sdmmc3_dat1_pb6",
"sdmmc3_dat2_pb5", "sdmmc3_dat2_pb5",
"sdmmc3_dat3_pb4", "sdmmc3_dat3_pb4",

View File

@ -823,7 +823,7 @@
nvidia,elastic-limit = <16>; nvidia,elastic-limit = <16>;
nvidia,term-range-adj = <6>; nvidia,term-range-adj = <6>;
nvidia,xcvr-setup = <51>; nvidia,xcvr-setup = <51>;
nvidia.xcvr-setup-use-fuses; nvidia,xcvr-setup-use-fuses;
nvidia,xcvr-lsfslew = <1>; nvidia,xcvr-lsfslew = <1>;
nvidia,xcvr-lsrslew = <1>; nvidia,xcvr-lsrslew = <1>;
nvidia,xcvr-hsslew = <32>; nvidia,xcvr-hsslew = <32>;
@ -860,7 +860,7 @@
nvidia,elastic-limit = <16>; nvidia,elastic-limit = <16>;
nvidia,term-range-adj = <6>; nvidia,term-range-adj = <6>;
nvidia,xcvr-setup = <51>; nvidia,xcvr-setup = <51>;
nvidia.xcvr-setup-use-fuses; nvidia,xcvr-setup-use-fuses;
nvidia,xcvr-lsfslew = <2>; nvidia,xcvr-lsfslew = <2>;
nvidia,xcvr-lsrslew = <2>; nvidia,xcvr-lsrslew = <2>;
nvidia,xcvr-hsslew = <32>; nvidia,xcvr-hsslew = <32>;
@ -896,7 +896,7 @@
nvidia,elastic-limit = <16>; nvidia,elastic-limit = <16>;
nvidia,term-range-adj = <6>; nvidia,term-range-adj = <6>;
nvidia,xcvr-setup = <51>; nvidia,xcvr-setup = <51>;
nvidia.xcvr-setup-use-fuses; nvidia,xcvr-setup-use-fuses;
nvidia,xcvr-lsfslew = <2>; nvidia,xcvr-lsfslew = <2>;
nvidia,xcvr-lsrslew = <2>; nvidia,xcvr-lsrslew = <2>;
nvidia,xcvr-hsslew = <32>; nvidia,xcvr-hsslew = <32>;

View File

@ -303,7 +303,7 @@
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
ssp@101f4000 { spi@101f4000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x101f4000 0x1000>; reg = <0x101f4000 0x1000>;
interrupts = <11>; interrupts = <11>;

View File

@ -273,16 +273,15 @@ __sys_trace:
cmp scno, #-1 @ skip the syscall? cmp scno, #-1 @ skip the syscall?
bne 2b bne 2b
add sp, sp, #S_OFF @ restore stack add sp, sp, #S_OFF @ restore stack
b ret_slow_syscall
__sys_trace_return: __sys_trace_return_nosave:
str r0, [sp, #S_R0 + S_OFF]! @ save returned r0 enable_irq_notrace
mov r0, sp mov r0, sp
bl syscall_trace_exit bl syscall_trace_exit
b ret_slow_syscall b ret_slow_syscall
__sys_trace_return_nosave: __sys_trace_return:
enable_irq_notrace str r0, [sp, #S_R0 + S_OFF]! @ save returned r0
mov r0, sp mov r0, sp
bl syscall_trace_exit bl syscall_trace_exit
b ret_slow_syscall b ret_slow_syscall

View File

@ -366,7 +366,8 @@ static void stage2_flush_memslot(struct kvm *kvm,
pgd = kvm->arch.pgd + stage2_pgd_index(addr); pgd = kvm->arch.pgd + stage2_pgd_index(addr);
do { do {
next = stage2_pgd_addr_end(addr, end); next = stage2_pgd_addr_end(addr, end);
stage2_flush_puds(kvm, pgd, addr, next); if (!stage2_pgd_none(*pgd))
stage2_flush_puds(kvm, pgd, addr, next);
} while (pgd++, addr = next, addr != end); } while (pgd++, addr = next, addr != end);
} }

View File

@ -602,6 +602,28 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
IMX6Q_GPR1_GINT); IMX6Q_GPR1_GINT);
} }
static void imx6_pm_stby_poweroff(void)
{
imx6_set_lpm(STOP_POWER_OFF);
imx6q_suspend_finish(0);
mdelay(1000);
pr_emerg("Unable to poweroff system\n");
}
static int imx6_pm_stby_poweroff_probe(void)
{
if (pm_power_off) {
pr_warn("%s: pm_power_off already claimed %p %pf!\n",
__func__, pm_power_off, pm_power_off);
return -EBUSY;
}
pm_power_off = imx6_pm_stby_poweroff;
return 0;
}
void __init imx6_pm_ccm_init(const char *ccm_compat) void __init imx6_pm_ccm_init(const char *ccm_compat)
{ {
struct device_node *np; struct device_node *np;
@ -618,6 +640,9 @@ void __init imx6_pm_ccm_init(const char *ccm_compat)
val = readl_relaxed(ccm_base + CLPCR); val = readl_relaxed(ccm_base + CLPCR);
val &= ~BM_CLPCR_LPM; val &= ~BM_CLPCR_LPM;
writel_relaxed(val, ccm_base + CLPCR); writel_relaxed(val, ccm_base + CLPCR);
if (of_property_read_bool(np, "fsl,pmic-stby-poweroff"))
imx6_pm_stby_poweroff_probe();
} }
void __init imx6q_pm_init(void) void __init imx6q_pm_init(void)

View File

@ -106,7 +106,7 @@
clock-names = "uartclk", "apb_pclk"; clock-names = "uartclk", "apb_pclk";
}; };
spi0: ssp@e1020000 { spi0: spi@e1020000 {
status = "disabled"; status = "disabled";
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0 0xe1020000 0 0x1000>; reg = <0 0xe1020000 0 0x1000>;
@ -116,7 +116,7 @@
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
spi1: ssp@e1030000 { spi1: spi@e1030000 {
status = "disabled"; status = "disabled";
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0 0xe1030000 0 0x1000>; reg = <0 0xe1030000 0 0x1000>;

View File

@ -167,14 +167,14 @@
clock-names = "apb_pclk"; clock-names = "apb_pclk";
status="disabled"; status="disabled";
}; };
spi0: ssp@fe800000 { spi0: spi@fe800000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe800000 0x1000>; reg = <0x0 0xfe800000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_bus>; clocks = <&clk_bus>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
spi1: ssp@fe900000 { spi1: spi@fe900000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe900000 0x1000>; reg = <0x0 0xfe900000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;

View File

@ -167,14 +167,14 @@
clock-names = "apb_pclk"; clock-names = "apb_pclk";
status="disabled"; status="disabled";
}; };
spi0: ssp@fe800000 { spi0: spi@fe800000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe800000 0x1000>; reg = <0x0 0xfe800000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_bus>; clocks = <&clk_bus>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
spi1: ssp@fe900000 { spi1: spi@fe900000 {
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe900000 0x1000>; reg = <0x0 0xfe900000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;

View File

@ -281,6 +281,7 @@
status = "okay"; status = "okay";
bus-width = <8>; bus-width = <8>;
non-removable; non-removable;
vqmmc-supply = <&vdd_1v8>;
}; };
clocks { clocks {

View File

@ -57,5 +57,7 @@ ENDPROC(__arch_clear_user)
.section .fixup,"ax" .section .fixup,"ax"
.align 2 .align 2
9: mov x0, x2 // return the original size 9: mov x0, x2 // return the original size
ALTERNATIVE("nop", __stringify(SET_PSTATE_PAN(1)), ARM64_ALT_PAN_NOT_UAO, \
CONFIG_ARM64_PAN)
ret ret
.previous .previous

View File

@ -75,5 +75,7 @@ ENDPROC(__arch_copy_from_user)
.section .fixup,"ax" .section .fixup,"ax"
.align 2 .align 2
9998: sub x0, end, dst // bytes not copied 9998: sub x0, end, dst // bytes not copied
ALTERNATIVE("nop", __stringify(SET_PSTATE_PAN(1)), ARM64_ALT_PAN_NOT_UAO, \
CONFIG_ARM64_PAN)
ret ret
.previous .previous

View File

@ -76,5 +76,7 @@ ENDPROC(__arch_copy_in_user)
.section .fixup,"ax" .section .fixup,"ax"
.align 2 .align 2
9998: sub x0, end, dst // bytes not copied 9998: sub x0, end, dst // bytes not copied
ALTERNATIVE("nop", __stringify(SET_PSTATE_PAN(1)), ARM64_ALT_PAN_NOT_UAO, \
CONFIG_ARM64_PAN)
ret ret
.previous .previous

View File

@ -74,5 +74,7 @@ ENDPROC(__arch_copy_to_user)
.section .fixup,"ax" .section .fixup,"ax"
.align 2 .align 2
9998: sub x0, end, dst // bytes not copied 9998: sub x0, end, dst // bytes not copied
ALTERNATIVE("nop", __stringify(SET_PSTATE_PAN(1)), ARM64_ALT_PAN_NOT_UAO, \
CONFIG_ARM64_PAN)
ret ret
.previous .previous

View File

@ -424,7 +424,7 @@ static int __init dummy_numa_init(void)
if (numa_off) if (numa_off)
pr_info("NUMA disabled\n"); /* Forced off on command line. */ pr_info("NUMA disabled\n"); /* Forced off on command line. */
pr_info("Faking a node at [mem %#018Lx-%#018Lx]\n", pr_info("Faking a node at [mem %#018Lx-%#018Lx]\n",
0LLU, PFN_PHYS(max_pfn) - 1); memblock_start_of_DRAM(), memblock_end_of_DRAM() - 1);
for_each_memblock(memory, mblk) { for_each_memblock(memory, mblk) {
ret = numa_add_memblk(0, mblk->base, mblk->base + mblk->size); ret = numa_add_memblk(0, mblk->base, mblk->base + mblk->size);

View File

@ -4,9 +4,8 @@
#include <bcm47xx_board.h> #include <bcm47xx_board.h>
#include <bcm47xx.h> #include <bcm47xx.h>
static void __init bcm47xx_workarounds_netgear_wnr3500l(void) static void __init bcm47xx_workarounds_enable_usb_power(int usb_power)
{ {
const int usb_power = 12;
int err; int err;
err = gpio_request_one(usb_power, GPIOF_OUT_INIT_HIGH, "usb_power"); err = gpio_request_one(usb_power, GPIOF_OUT_INIT_HIGH, "usb_power");
@ -22,7 +21,10 @@ void __init bcm47xx_workarounds(void)
switch (board) { switch (board) {
case BCM47XX_BOARD_NETGEAR_WNR3500L: case BCM47XX_BOARD_NETGEAR_WNR3500L:
bcm47xx_workarounds_netgear_wnr3500l(); bcm47xx_workarounds_enable_usb_power(12);
break;
case BCM47XX_BOARD_NETGEAR_WNDR3400_V3:
bcm47xx_workarounds_enable_usb_power(21);
break; break;
default: default:
/* No workaround(s) needed */ /* No workaround(s) needed */

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@ -12,11 +12,11 @@
#include <asm/stacktrace.h> #include <asm/stacktrace.h>
/* Maximum physical address we can use pages from */ /* Maximum physical address we can use pages from */
#define KEXEC_SOURCE_MEMORY_LIMIT (0x20000000) #define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
/* Maximum address we can reach in physical address mode */ /* Maximum address we can reach in physical address mode */
#define KEXEC_DESTINATION_MEMORY_LIMIT (0x20000000) #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
/* Maximum address we can use for the control code buffer */ /* Maximum address we can use for the control code buffer */
#define KEXEC_CONTROL_MEMORY_LIMIT (0x20000000) #define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
/* Reserve 3*4096 bytes for board-specific info */ /* Reserve 3*4096 bytes for board-specific info */
#define KEXEC_CONTROL_PAGE_SIZE (4096 + 3*4096) #define KEXEC_CONTROL_PAGE_SIZE (4096 + 3*4096)

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@ -959,12 +959,11 @@ void __init txx9_sramc_init(struct resource *r)
goto exit_put; goto exit_put;
err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr); err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
if (err) { if (err) {
device_unregister(&dev->dev);
iounmap(dev->base); iounmap(dev->base);
kfree(dev); device_unregister(&dev->dev);
} }
return; return;
exit_put: exit_put:
iounmap(dev->base);
put_device(&dev->dev); put_device(&dev->dev);
return;
} }

View File

@ -4,6 +4,8 @@
#include <types.h> #include <types.h>
#include <string.h> #include <string.h>
#define INT_MAX ((int)(~0U>>1))
#include "of.h" #include "of.h"
typedef u32 uint32_t; typedef u32 uint32_t;

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@ -765,9 +765,9 @@ dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
vaddr = page_address(page) + offset; vaddr = page_address(page) + offset;
uaddr = (unsigned long)vaddr; uaddr = (unsigned long)vaddr;
npages = iommu_num_pages(uaddr, size, IOMMU_PAGE_SIZE(tbl));
if (tbl) { if (tbl) {
npages = iommu_num_pages(uaddr, size, IOMMU_PAGE_SIZE(tbl));
align = 0; align = 0;
if (tbl->it_page_shift < PAGE_SHIFT && size >= PAGE_SIZE && if (tbl->it_page_shift < PAGE_SHIFT && size >= PAGE_SIZE &&
((unsigned long)vaddr & ~PAGE_MASK) == 0) ((unsigned long)vaddr & ~PAGE_MASK) == 0)

View File

@ -984,6 +984,7 @@ int rtas_ibm_suspend_me(u64 handle)
goto out; goto out;
} }
cpu_hotplug_disable();
stop_topology_update(); stop_topology_update();
/* Call function on all CPUs. One of us will make the /* Call function on all CPUs. One of us will make the
@ -998,6 +999,7 @@ int rtas_ibm_suspend_me(u64 handle)
printk(KERN_ERR "Error doing global join\n"); printk(KERN_ERR "Error doing global join\n");
start_topology_update(); start_topology_update();
cpu_hotplug_enable();
/* Take down CPUs not online prior to suspend */ /* Take down CPUs not online prior to suspend */
cpuret = rtas_offline_cpus_mask(offline_mask); cpuret = rtas_offline_cpus_mask(offline_mask);

View File

@ -37,6 +37,7 @@ data_page_branch:
mtlr r0 mtlr r0
addi r3, r3, __kernel_datapage_offset-data_page_branch addi r3, r3, __kernel_datapage_offset-data_page_branch
lwz r0,0(r3) lwz r0,0(r3)
.cfi_restore lr
add r3,r0,r3 add r3,r0,r3
blr blr
.cfi_endproc .cfi_endproc

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@ -139,6 +139,7 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
*/ */
99: 99:
li r0,__NR_clock_gettime li r0,__NR_clock_gettime
.cfi_restore lr
sc sc
blr blr
.cfi_endproc .cfi_endproc

View File

@ -37,6 +37,7 @@ data_page_branch:
mtlr r0 mtlr r0
addi r3, r3, __kernel_datapage_offset-data_page_branch addi r3, r3, __kernel_datapage_offset-data_page_branch
lwz r0,0(r3) lwz r0,0(r3)
.cfi_restore lr
add r3,r0,r3 add r3,r0,r3
blr blr
.cfi_endproc .cfi_endproc

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@ -124,6 +124,7 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
*/ */
99: 99:
li r0,__NR_clock_gettime li r0,__NR_clock_gettime
.cfi_restore lr
sc sc
blr blr
.cfi_endproc .cfi_endproc

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@ -78,8 +78,11 @@ void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
{ {
if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) { if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
ulong pc = kvmppc_get_pc(vcpu); ulong pc = kvmppc_get_pc(vcpu);
ulong lr = kvmppc_get_lr(vcpu);
if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK); kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK);
vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK; vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
} }
} }

View File

@ -321,7 +321,7 @@ void slb_initialize(void)
#endif #endif
} }
get_paca()->stab_rr = SLB_NUM_BOLTED; get_paca()->stab_rr = SLB_NUM_BOLTED - 1;
lflags = SLB_VSID_KERNEL | linear_llp; lflags = SLB_VSID_KERNEL | linear_llp;
vflags = SLB_VSID_KERNEL | vmalloc_llp; vflags = SLB_VSID_KERNEL | vmalloc_llp;

View File

@ -150,7 +150,7 @@ static int dtl_start(struct dtl *dtl)
/* Register our dtl buffer with the hypervisor. The HV expects the /* Register our dtl buffer with the hypervisor. The HV expects the
* buffer size to be passed in the second word of the buffer */ * buffer size to be passed in the second word of the buffer */
((u32 *)dtl->buf)[1] = DISPATCH_LOG_BYTES; ((u32 *)dtl->buf)[1] = cpu_to_be32(DISPATCH_LOG_BYTES);
hwcpu = get_hard_smp_processor_id(dtl->cpu); hwcpu = get_hard_smp_processor_id(dtl->cpu);
addr = __pa(dtl->buf); addr = __pa(dtl->buf);
@ -185,7 +185,7 @@ static void dtl_stop(struct dtl *dtl)
static u64 dtl_current_index(struct dtl *dtl) static u64 dtl_current_index(struct dtl *dtl)
{ {
return lppaca_of(dtl->cpu).dtl_idx; return be64_to_cpu(lppaca_of(dtl->cpu).dtl_idx);
} }
#endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */

View File

@ -24,9 +24,10 @@ obj-y += vdso32_wrapper.o
extra-y += vdso32.lds extra-y += vdso32.lds
CPPFLAGS_vdso32.lds += -P -C -U$(ARCH) CPPFLAGS_vdso32.lds += -P -C -U$(ARCH)
# Disable gcov profiling and ubsan for VDSO code # Disable gcov profiling, ubsan and kasan for VDSO code
GCOV_PROFILE := n GCOV_PROFILE := n
UBSAN_SANITIZE := n UBSAN_SANITIZE := n
KASAN_SANITIZE := n
# Force dependency (incbin is bad) # Force dependency (incbin is bad)
$(obj)/vdso32_wrapper.o : $(obj)/vdso32.so $(obj)/vdso32_wrapper.o : $(obj)/vdso32.so

View File

@ -24,9 +24,10 @@ obj-y += vdso64_wrapper.o
extra-y += vdso64.lds extra-y += vdso64.lds
CPPFLAGS_vdso64.lds += -P -C -U$(ARCH) CPPFLAGS_vdso64.lds += -P -C -U$(ARCH)
# Disable gcov profiling and ubsan for VDSO code # Disable gcov profiling, ubsan and kasan for VDSO code
GCOV_PROFILE := n GCOV_PROFILE := n
UBSAN_SANITIZE := n UBSAN_SANITIZE := n
KASAN_SANITIZE := n
# Force dependency (incbin is bad) # Force dependency (incbin is bad)
$(obj)/vdso64_wrapper.o : $(obj)/vdso64.so $(obj)/vdso64_wrapper.o : $(obj)/vdso64.so

View File

@ -2613,8 +2613,7 @@ config OLPC
config OLPC_XO1_PM config OLPC_XO1_PM
bool "OLPC XO-1 Power Management" bool "OLPC XO-1 Power Management"
depends on OLPC && MFD_CS5535 && PM_SLEEP depends on OLPC && MFD_CS5535=y && PM_SLEEP
select MFD_CORE
---help--- ---help---
Add support for poweroff and suspend of the OLPC XO-1 laptop. Add support for poweroff and suspend of the OLPC XO-1 laptop.

View File

@ -49,7 +49,7 @@ static __always_inline void atomic_add(int i, atomic_t *v)
{ {
asm volatile(LOCK_PREFIX "addl %1,%0" asm volatile(LOCK_PREFIX "addl %1,%0"
: "+m" (v->counter) : "+m" (v->counter)
: "ir" (i)); : "ir" (i) : "memory");
} }
/** /**
@ -63,7 +63,7 @@ static __always_inline void atomic_sub(int i, atomic_t *v)
{ {
asm volatile(LOCK_PREFIX "subl %1,%0" asm volatile(LOCK_PREFIX "subl %1,%0"
: "+m" (v->counter) : "+m" (v->counter)
: "ir" (i)); : "ir" (i) : "memory");
} }
/** /**
@ -89,7 +89,7 @@ static __always_inline bool atomic_sub_and_test(int i, atomic_t *v)
static __always_inline void atomic_inc(atomic_t *v) static __always_inline void atomic_inc(atomic_t *v)
{ {
asm volatile(LOCK_PREFIX "incl %0" asm volatile(LOCK_PREFIX "incl %0"
: "+m" (v->counter)); : "+m" (v->counter) :: "memory");
} }
/** /**
@ -101,7 +101,7 @@ static __always_inline void atomic_inc(atomic_t *v)
static __always_inline void atomic_dec(atomic_t *v) static __always_inline void atomic_dec(atomic_t *v)
{ {
asm volatile(LOCK_PREFIX "decl %0" asm volatile(LOCK_PREFIX "decl %0"
: "+m" (v->counter)); : "+m" (v->counter) :: "memory");
} }
/** /**

View File

@ -44,7 +44,7 @@ static __always_inline void atomic64_add(long i, atomic64_t *v)
{ {
asm volatile(LOCK_PREFIX "addq %1,%0" asm volatile(LOCK_PREFIX "addq %1,%0"
: "=m" (v->counter) : "=m" (v->counter)
: "er" (i), "m" (v->counter)); : "er" (i), "m" (v->counter) : "memory");
} }
/** /**
@ -58,7 +58,7 @@ static inline void atomic64_sub(long i, atomic64_t *v)
{ {
asm volatile(LOCK_PREFIX "subq %1,%0" asm volatile(LOCK_PREFIX "subq %1,%0"
: "=m" (v->counter) : "=m" (v->counter)
: "er" (i), "m" (v->counter)); : "er" (i), "m" (v->counter) : "memory");
} }
/** /**
@ -85,7 +85,7 @@ static __always_inline void atomic64_inc(atomic64_t *v)
{ {
asm volatile(LOCK_PREFIX "incq %0" asm volatile(LOCK_PREFIX "incq %0"
: "=m" (v->counter) : "=m" (v->counter)
: "m" (v->counter)); : "m" (v->counter) : "memory");
} }
/** /**
@ -98,7 +98,7 @@ static __always_inline void atomic64_dec(atomic64_t *v)
{ {
asm volatile(LOCK_PREFIX "decq %0" asm volatile(LOCK_PREFIX "decq %0"
: "=m" (v->counter) : "=m" (v->counter)
: "m" (v->counter)); : "m" (v->counter) : "memory");
} }
/** /**

View File

@ -105,8 +105,8 @@ do { \
#endif #endif
/* Atomic operations are already serializing on x86 */ /* Atomic operations are already serializing on x86 */
#define __smp_mb__before_atomic() barrier() #define __smp_mb__before_atomic() do { } while (0)
#define __smp_mb__after_atomic() barrier() #define __smp_mb__after_atomic() do { } while (0)
#include <asm-generic/barrier.h> #include <asm-generic/barrier.h>

View File

@ -208,4 +208,22 @@ static inline int insn_offset_immediate(struct insn *insn)
return insn_offset_displacement(insn) + insn->displacement.nbytes; return insn_offset_displacement(insn) + insn->displacement.nbytes;
} }
#define POP_SS_OPCODE 0x1f
#define MOV_SREG_OPCODE 0x8e
/*
* Intel SDM Vol.3A 6.8.3 states;
* "Any single-step trap that would be delivered following the MOV to SS
* instruction or POP to SS instruction (because EFLAGS.TF is 1) is
* suppressed."
* This function returns true if @insn is MOV SS or POP SS. On these
* instructions, single stepping is suppressed.
*/
static inline int insn_masking_exception(struct insn *insn)
{
return insn->opcode.bytes[0] == POP_SS_OPCODE ||
(insn->opcode.bytes[0] == MOV_SREG_OPCODE &&
X86_MODRM_REG(insn->modrm.bytes[0]) == 2);
}
#endif /* _ASM_X86_INSN_H */ #endif /* _ASM_X86_INSN_H */

View File

@ -66,7 +66,7 @@ struct kimage;
/* Memory to backup during crash kdump */ /* Memory to backup during crash kdump */
#define KEXEC_BACKUP_SRC_START (0UL) #define KEXEC_BACKUP_SRC_START (0UL)
#define KEXEC_BACKUP_SRC_END (640 * 1024UL) /* 640K */ #define KEXEC_BACKUP_SRC_END (640 * 1024UL - 1) /* 640K */
/* /*
* CPU does not save ss and sp on stack if execution is already * CPU does not save ss and sp on stack if execution is already

View File

@ -434,7 +434,7 @@ static void cyrix_identify(struct cpuinfo_x86 *c)
/* enable MAPEN */ /* enable MAPEN */
setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10);
/* enable cpuid */ /* enable cpuid */
setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x80); setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x80);
/* disable MAPEN */ /* disable MAPEN */
setCx86(CX86_CCR3, ccr3); setCx86(CX86_CCR3, ccr3);
local_irq_restore(flags); local_irq_restore(flags);

View File

@ -376,6 +376,10 @@ int __copy_instruction(u8 *dest, u8 *src)
return 0; return 0;
memcpy(dest, insn.kaddr, length); memcpy(dest, insn.kaddr, length);
/* We should not singlestep on the exception masking instructions */
if (insn_masking_exception(&insn))
return 0;
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
if (insn_rip_relative(&insn)) { if (insn_rip_relative(&insn)) {
s64 newdisp; s64 newdisp;

View File

@ -296,6 +296,10 @@ static int uprobe_init_insn(struct arch_uprobe *auprobe, struct insn *insn, bool
if (is_prefix_bad(insn)) if (is_prefix_bad(insn))
return -ENOTSUPP; return -ENOTSUPP;
/* We should not singlestep on the exception masking instructions */
if (insn_masking_exception(insn))
return -ENOTSUPP;
if (x86_64) if (x86_64)
good_insns = good_insns_64; good_insns = good_insns_64;
else else
@ -983,7 +987,7 @@ arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs
pr_err("uprobe: return address clobbered: pid=%d, %%sp=%#lx, " pr_err("uprobe: return address clobbered: pid=%d, %%sp=%#lx, "
"%%ip=%#lx\n", current->pid, regs->sp, regs->ip); "%%ip=%#lx\n", current->pid, regs->sp, regs->ip);
force_sig_info(SIGSEGV, SEND_SIG_FORCED, current); force_sig(SIGSEGV, current);
} }
return -1; return -1;

View File

@ -267,15 +267,6 @@ static int pkcs1pad_encrypt(struct akcipher_request *req)
pkcs1pad_sg_set_buf(req_ctx->in_sg, req_ctx->in_buf, pkcs1pad_sg_set_buf(req_ctx->in_sg, req_ctx->in_buf,
ctx->key_size - 1 - req->src_len, req->src); ctx->key_size - 1 - req->src_len, req->src);
req_ctx->out_buf = kmalloc(ctx->key_size, GFP_KERNEL);
if (!req_ctx->out_buf) {
kfree(req_ctx->in_buf);
return -ENOMEM;
}
pkcs1pad_sg_set_buf(req_ctx->out_sg, req_ctx->out_buf,
ctx->key_size, NULL);
akcipher_request_set_tfm(&req_ctx->child_req, ctx->child); akcipher_request_set_tfm(&req_ctx->child_req, ctx->child);
akcipher_request_set_callback(&req_ctx->child_req, req->base.flags, akcipher_request_set_callback(&req_ctx->child_req, req->base.flags,
pkcs1pad_encrypt_sign_complete_cb, req); pkcs1pad_encrypt_sign_complete_cb, req);

View File

@ -247,6 +247,8 @@ acpi_status
acpi_ev_initialize_region(union acpi_operand_object *region_obj, acpi_ev_initialize_region(union acpi_operand_object *region_obj,
u8 acpi_ns_locked); u8 acpi_ns_locked);
u8 acpi_ev_is_pci_root_bridge(struct acpi_namespace_node *node);
/* /*
* evsci - SCI (System Control Interrupt) handling/dispatch * evsci - SCI (System Control Interrupt) handling/dispatch
*/ */

View File

@ -428,9 +428,9 @@ struct acpi_simple_repair_info {
/* Info for running the _REG methods */ /* Info for running the _REG methods */
struct acpi_reg_walk_info { struct acpi_reg_walk_info {
acpi_adr_space_type space_id;
u32 function; u32 function;
u32 reg_run_count; u32 reg_run_count;
acpi_adr_space_type space_id;
}; };
/***************************************************************************** /*****************************************************************************

View File

@ -677,6 +677,19 @@ acpi_ev_execute_reg_methods(struct acpi_namespace_node *node,
ACPI_FUNCTION_TRACE(ev_execute_reg_methods); ACPI_FUNCTION_TRACE(ev_execute_reg_methods);
/*
* These address spaces do not need a call to _REG, since the ACPI
* specification defines them as: "must always be accessible". Since
* they never change state (never become unavailable), no need to ever
* call _REG on them. Also, a data_table is not a "real" address space,
* so do not call _REG. September 2018.
*/
if ((space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) ||
(space_id == ACPI_ADR_SPACE_SYSTEM_IO) ||
(space_id == ACPI_ADR_SPACE_DATA_TABLE)) {
return_VOID;
}
info.space_id = space_id; info.space_id = space_id;
info.function = function; info.function = function;
info.reg_run_count = 0; info.reg_run_count = 0;
@ -738,8 +751,8 @@ acpi_ev_reg_run(acpi_handle obj_handle,
} }
/* /*
* We only care about regions.and objects that are allowed to have address * We only care about regions and objects that are allowed to have
* space handlers * address space handlers
*/ */
if ((node->type != ACPI_TYPE_REGION) && (node != acpi_gbl_root_node)) { if ((node->type != ACPI_TYPE_REGION) && (node != acpi_gbl_root_node)) {
return (AE_OK); return (AE_OK);

View File

@ -50,9 +50,6 @@
#define _COMPONENT ACPI_EVENTS #define _COMPONENT ACPI_EVENTS
ACPI_MODULE_NAME("evrgnini") ACPI_MODULE_NAME("evrgnini")
/* Local prototypes */
static u8 acpi_ev_is_pci_root_bridge(struct acpi_namespace_node *node);
/******************************************************************************* /*******************************************************************************
* *
* FUNCTION: acpi_ev_system_memory_region_setup * FUNCTION: acpi_ev_system_memory_region_setup
@ -67,7 +64,6 @@ static u8 acpi_ev_is_pci_root_bridge(struct acpi_namespace_node *node);
* DESCRIPTION: Setup a system_memory operation region * DESCRIPTION: Setup a system_memory operation region
* *
******************************************************************************/ ******************************************************************************/
acpi_status acpi_status
acpi_ev_system_memory_region_setup(acpi_handle handle, acpi_ev_system_memory_region_setup(acpi_handle handle,
u32 function, u32 function,
@ -347,7 +343,7 @@ acpi_ev_pci_config_region_setup(acpi_handle handle,
* *
******************************************************************************/ ******************************************************************************/
static u8 acpi_ev_is_pci_root_bridge(struct acpi_namespace_node *node) u8 acpi_ev_is_pci_root_bridge(struct acpi_namespace_node *node)
{ {
acpi_status status; acpi_status status;
struct acpi_pnp_device_id *hid; struct acpi_pnp_device_id *hid;

View File

@ -227,7 +227,6 @@ acpi_remove_address_space_handler(acpi_handle device,
*/ */
region_obj = region_obj =
handler_obj->address_space.region_list; handler_obj->address_space.region_list;
} }
/* Remove this Handler object from the list */ /* Remove this Handler object from the list */

View File

@ -1126,6 +1126,7 @@ void acpi_os_wait_events_complete(void)
flush_workqueue(kacpid_wq); flush_workqueue(kacpid_wq);
flush_workqueue(kacpi_notify_wq); flush_workqueue(kacpi_notify_wq);
} }
EXPORT_SYMBOL(acpi_os_wait_events_complete);
struct acpi_hp_work { struct acpi_hp_work {
struct work_struct work; struct work_struct work;

View File

@ -454,8 +454,9 @@ static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
decode_osc_support(root, "OS supports", support); decode_osc_support(root, "OS supports", support);
status = acpi_pci_osc_support(root, support); status = acpi_pci_osc_support(root, support);
if (ACPI_FAILURE(status)) { if (ACPI_FAILURE(status)) {
dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n", dev_info(&device->dev, "_OSC failed (%s)%s\n",
acpi_format_exception(status)); acpi_format_exception(status),
pcie_aspm_support_enabled() ? "; disabling ASPM" : "");
*no_aspm = 1; *no_aspm = 1;
return; return;
} }

View File

@ -196,6 +196,7 @@ int acpi_smbus_unregister_callback(struct acpi_smb_hc *hc)
hc->callback = NULL; hc->callback = NULL;
hc->context = NULL; hc->context = NULL;
mutex_unlock(&hc->lock); mutex_unlock(&hc->lock);
acpi_os_wait_events_complete();
return 0; return 0;
} }
@ -292,6 +293,7 @@ static int acpi_smbus_hc_remove(struct acpi_device *device)
hc = acpi_driver_data(device); hc = acpi_driver_data(device);
acpi_ec_remove_query_handler(hc->ec, hc->query_bit); acpi_ec_remove_query_handler(hc->ec, hc->query_bit);
acpi_os_wait_events_complete();
kfree(hc); kfree(hc);
device->driver_data = NULL; device->driver_data = NULL;
return 0; return 0;

View File

@ -100,7 +100,8 @@ config SATA_AHCI_PLATFORM
config AHCI_BRCM config AHCI_BRCM
tristate "Broadcom AHCI SATA support" tristate "Broadcom AHCI SATA support"
depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM_NSP depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM_NSP || \
ARCH_BCM_63XX
help help
This option enables support for the AHCI SATA3 controller found on This option enables support for the AHCI SATA3 controller found on
Broadcom SoC's. Broadcom SoC's.

View File

@ -1734,6 +1734,21 @@ nothing_to_do:
return 1; return 1;
} }
static bool ata_check_nblocks(struct scsi_cmnd *scmd, u32 n_blocks)
{
struct request *rq = scmd->request;
u32 req_blocks;
if (!blk_rq_is_passthrough(rq))
return true;
req_blocks = blk_rq_bytes(rq) / scmd->device->sector_size;
if (n_blocks > req_blocks)
return false;
return true;
}
/** /**
* ata_scsi_rw_xlat - Translate SCSI r/w command into an ATA one * ata_scsi_rw_xlat - Translate SCSI r/w command into an ATA one
* @qc: Storage for translated ATA taskfile * @qc: Storage for translated ATA taskfile
@ -1776,6 +1791,8 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc)
scsi_10_lba_len(cdb, &block, &n_block); scsi_10_lba_len(cdb, &block, &n_block);
if (cdb[1] & (1 << 3)) if (cdb[1] & (1 << 3))
tf_flags |= ATA_TFLAG_FUA; tf_flags |= ATA_TFLAG_FUA;
if (!ata_check_nblocks(scmd, n_block))
goto invalid_fld;
break; break;
case READ_6: case READ_6:
case WRITE_6: case WRITE_6:
@ -1790,6 +1807,8 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc)
*/ */
if (!n_block) if (!n_block)
n_block = 256; n_block = 256;
if (!ata_check_nblocks(scmd, n_block))
goto invalid_fld;
break; break;
case READ_16: case READ_16:
case WRITE_16: case WRITE_16:
@ -1800,6 +1819,8 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc)
scsi_16_lba_len(cdb, &block, &n_block); scsi_16_lba_len(cdb, &block, &n_block);
if (cdb[1] & (1 << 3)) if (cdb[1] & (1 << 3))
tf_flags |= ATA_TFLAG_FUA; tf_flags |= ATA_TFLAG_FUA;
if (!ata_check_nblocks(scmd, n_block))
goto invalid_fld;
break; break;
default: default:
DPRINTK("no-byte command\n"); DPRINTK("no-byte command\n");

View File

@ -659,7 +659,7 @@ static void ep93xx_pata_dma_init(struct ep93xx_pata_data *drv_data)
* start of new transfer. * start of new transfer.
*/ */
drv_data->dma_rx_data.port = EP93XX_DMA_IDE; drv_data->dma_rx_data.port = EP93XX_DMA_IDE;
drv_data->dma_rx_data.direction = DMA_FROM_DEVICE; drv_data->dma_rx_data.direction = DMA_DEV_TO_MEM;
drv_data->dma_rx_data.name = "ep93xx-pata-rx"; drv_data->dma_rx_data.name = "ep93xx-pata-rx";
drv_data->dma_rx_channel = dma_request_channel(mask, drv_data->dma_rx_channel = dma_request_channel(mask,
ep93xx_pata_dma_filter, &drv_data->dma_rx_data); ep93xx_pata_dma_filter, &drv_data->dma_rx_data);
@ -667,7 +667,7 @@ static void ep93xx_pata_dma_init(struct ep93xx_pata_data *drv_data)
return; return;
drv_data->dma_tx_data.port = EP93XX_DMA_IDE; drv_data->dma_tx_data.port = EP93XX_DMA_IDE;
drv_data->dma_tx_data.direction = DMA_TO_DEVICE; drv_data->dma_tx_data.direction = DMA_MEM_TO_DEV;
drv_data->dma_tx_data.name = "ep93xx-pata-tx"; drv_data->dma_tx_data.name = "ep93xx-pata-tx";
drv_data->dma_tx_channel = dma_request_channel(mask, drv_data->dma_tx_channel = dma_request_channel(mask,
ep93xx_pata_dma_filter, &drv_data->dma_tx_data); ep93xx_pata_dma_filter, &drv_data->dma_tx_data);
@ -678,7 +678,7 @@ static void ep93xx_pata_dma_init(struct ep93xx_pata_data *drv_data)
/* Configure receive channel direction and source address */ /* Configure receive channel direction and source address */
memset(&conf, 0, sizeof(conf)); memset(&conf, 0, sizeof(conf));
conf.direction = DMA_FROM_DEVICE; conf.direction = DMA_DEV_TO_MEM;
conf.src_addr = drv_data->udma_in_phys; conf.src_addr = drv_data->udma_in_phys;
conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
if (dmaengine_slave_config(drv_data->dma_rx_channel, &conf)) { if (dmaengine_slave_config(drv_data->dma_rx_channel, &conf)) {
@ -689,7 +689,7 @@ static void ep93xx_pata_dma_init(struct ep93xx_pata_data *drv_data)
/* Configure transmit channel direction and destination address */ /* Configure transmit channel direction and destination address */
memset(&conf, 0, sizeof(conf)); memset(&conf, 0, sizeof(conf));
conf.direction = DMA_TO_DEVICE; conf.direction = DMA_MEM_TO_DEV;
conf.dst_addr = drv_data->udma_out_phys; conf.dst_addr = drv_data->udma_out_phys;
conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
if (dmaengine_slave_config(drv_data->dma_tx_channel, &conf)) { if (dmaengine_slave_config(drv_data->dma_tx_channel, &conf)) {

View File

@ -461,9 +461,9 @@ int component_bind_all(struct device *master_dev, void *data)
} }
if (ret != 0) { if (ret != 0) {
for (; i--; ) for (; i > 0; i--)
if (!master->match->compare[i].duplicate) { if (!master->match->compare[i - 1].duplicate) {
c = master->match->compare[i].component; c = master->match->compare[i - 1].component;
component_unbind(c, master, data); component_unbind(c, master, data);
} }
} }

View File

@ -152,7 +152,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
struct exynos_cpuclk *cpuclk, void __iomem *base) struct exynos_cpuclk *cpuclk, void __iomem *base)
{ {
const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg; const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg;
unsigned long alt_prate = clk_get_rate(cpuclk->alt_parent); unsigned long alt_prate = clk_hw_get_rate(cpuclk->alt_parent);
unsigned long alt_div = 0, alt_div_mask = DIV_MASK; unsigned long alt_div = 0, alt_div_mask = DIV_MASK;
unsigned long div0, div1 = 0, mux_reg; unsigned long div0, div1 = 0, mux_reg;
unsigned long flags; unsigned long flags;
@ -280,7 +280,7 @@ static int exynos5433_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
struct exynos_cpuclk *cpuclk, void __iomem *base) struct exynos_cpuclk *cpuclk, void __iomem *base)
{ {
const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg; const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg;
unsigned long alt_prate = clk_get_rate(cpuclk->alt_parent); unsigned long alt_prate = clk_hw_get_rate(cpuclk->alt_parent);
unsigned long alt_div = 0, alt_div_mask = DIV_MASK; unsigned long alt_div = 0, alt_div_mask = DIV_MASK;
unsigned long div0, div1 = 0, mux_reg; unsigned long div0, div1 = 0, mux_reg;
unsigned long flags; unsigned long flags;
@ -432,7 +432,7 @@ int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx,
else else
cpuclk->clk_nb.notifier_call = exynos_cpuclk_notifier_cb; cpuclk->clk_nb.notifier_call = exynos_cpuclk_notifier_cb;
cpuclk->alt_parent = __clk_lookup(alt_parent); cpuclk->alt_parent = __clk_get_hw(__clk_lookup(alt_parent));
if (!cpuclk->alt_parent) { if (!cpuclk->alt_parent) {
pr_err("%s: could not lookup alternate parent %s\n", pr_err("%s: could not lookup alternate parent %s\n",
__func__, alt_parent); __func__, alt_parent);

View File

@ -49,7 +49,7 @@ struct exynos_cpuclk_cfg_data {
*/ */
struct exynos_cpuclk { struct exynos_cpuclk {
struct clk_hw hw; struct clk_hw hw;
struct clk *alt_parent; struct clk_hw *alt_parent;
void __iomem *ctrl_base; void __iomem *ctrl_base;
spinlock_t *lock; spinlock_t *lock;
const struct exynos_cpuclk_cfg_data *cfg; const struct exynos_cpuclk_cfg_data *cfg;

View File

@ -28,9 +28,24 @@
#define DCP_MAX_CHANS 4 #define DCP_MAX_CHANS 4
#define DCP_BUF_SZ PAGE_SIZE #define DCP_BUF_SZ PAGE_SIZE
#define DCP_SHA_PAY_SZ 64
#define DCP_ALIGNMENT 64 #define DCP_ALIGNMENT 64
/*
* Null hashes to align with hw behavior on imx6sl and ull
* these are flipped for consistency with hw output
*/
const uint8_t sha1_null_hash[] =
"\x09\x07\xd8\xaf\x90\x18\x60\x95\xef\xbf"
"\x55\x32\x0d\x4b\x6b\x5e\xee\xa3\x39\xda";
const uint8_t sha256_null_hash[] =
"\x55\xb8\x52\x78\x1b\x99\x95\xa4"
"\x4c\x93\x9b\x64\xe4\x41\xae\x27"
"\x24\xb9\x6f\x99\xc8\xf4\xfb\x9a"
"\x14\x1c\xfc\x98\x42\xc4\xb0\xe3";
/* DCP DMA descriptor. */ /* DCP DMA descriptor. */
struct dcp_dma_desc { struct dcp_dma_desc {
uint32_t next_cmd_addr; uint32_t next_cmd_addr;
@ -48,6 +63,7 @@ struct dcp_coherent_block {
uint8_t aes_in_buf[DCP_BUF_SZ]; uint8_t aes_in_buf[DCP_BUF_SZ];
uint8_t aes_out_buf[DCP_BUF_SZ]; uint8_t aes_out_buf[DCP_BUF_SZ];
uint8_t sha_in_buf[DCP_BUF_SZ]; uint8_t sha_in_buf[DCP_BUF_SZ];
uint8_t sha_out_buf[DCP_SHA_PAY_SZ];
uint8_t aes_key[2 * AES_KEYSIZE_128]; uint8_t aes_key[2 * AES_KEYSIZE_128];
@ -209,6 +225,12 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,
dma_addr_t dst_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_out_buf, dma_addr_t dst_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_out_buf,
DCP_BUF_SZ, DMA_FROM_DEVICE); DCP_BUF_SZ, DMA_FROM_DEVICE);
if (actx->fill % AES_BLOCK_SIZE) {
dev_err(sdcp->dev, "Invalid block size!\n");
ret = -EINVAL;
goto aes_done_run;
}
/* Fill in the DMA descriptor. */ /* Fill in the DMA descriptor. */
desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE | desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE |
MXS_DCP_CONTROL0_INTERRUPT | MXS_DCP_CONTROL0_INTERRUPT |
@ -238,6 +260,7 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,
ret = mxs_dcp_start_dma(actx); ret = mxs_dcp_start_dma(actx);
aes_done_run:
dma_unmap_single(sdcp->dev, key_phys, 2 * AES_KEYSIZE_128, dma_unmap_single(sdcp->dev, key_phys, 2 * AES_KEYSIZE_128,
DMA_TO_DEVICE); DMA_TO_DEVICE);
dma_unmap_single(sdcp->dev, src_phys, DCP_BUF_SZ, DMA_TO_DEVICE); dma_unmap_single(sdcp->dev, src_phys, DCP_BUF_SZ, DMA_TO_DEVICE);
@ -264,13 +287,15 @@ static int mxs_dcp_aes_block_crypt(struct crypto_async_request *arq)
uint8_t *out_tmp, *src_buf, *dst_buf = NULL; uint8_t *out_tmp, *src_buf, *dst_buf = NULL;
uint32_t dst_off = 0; uint32_t dst_off = 0;
uint32_t last_out_len = 0;
uint8_t *key = sdcp->coh->aes_key; uint8_t *key = sdcp->coh->aes_key;
int ret = 0; int ret = 0;
int split = 0; int split = 0;
unsigned int i, len, clen, rem = 0; unsigned int i, len, clen, rem = 0, tlen = 0;
int init = 0; int init = 0;
bool limit_hit = false;
actx->fill = 0; actx->fill = 0;
@ -289,6 +314,11 @@ static int mxs_dcp_aes_block_crypt(struct crypto_async_request *arq)
for_each_sg(req->src, src, nents, i) { for_each_sg(req->src, src, nents, i) {
src_buf = sg_virt(src); src_buf = sg_virt(src);
len = sg_dma_len(src); len = sg_dma_len(src);
tlen += len;
limit_hit = tlen > req->nbytes;
if (limit_hit)
len = req->nbytes - (tlen - len);
do { do {
if (actx->fill + len > out_off) if (actx->fill + len > out_off)
@ -305,13 +335,15 @@ static int mxs_dcp_aes_block_crypt(struct crypto_async_request *arq)
* If we filled the buffer or this is the last SG, * If we filled the buffer or this is the last SG,
* submit the buffer. * submit the buffer.
*/ */
if (actx->fill == out_off || sg_is_last(src)) { if (actx->fill == out_off || sg_is_last(src) ||
limit_hit) {
ret = mxs_dcp_run_aes(actx, req, init); ret = mxs_dcp_run_aes(actx, req, init);
if (ret) if (ret)
return ret; return ret;
init = 0; init = 0;
out_tmp = out_buf; out_tmp = out_buf;
last_out_len = actx->fill;
while (dst && actx->fill) { while (dst && actx->fill) {
if (!split) { if (!split) {
dst_buf = sg_virt(dst); dst_buf = sg_virt(dst);
@ -334,6 +366,19 @@ static int mxs_dcp_aes_block_crypt(struct crypto_async_request *arq)
} }
} }
} while (len); } while (len);
if (limit_hit)
break;
}
/* Copy the IV for CBC for chaining */
if (!rctx->ecb) {
if (rctx->enc)
memcpy(req->info, out_buf+(last_out_len-AES_BLOCK_SIZE),
AES_BLOCK_SIZE);
else
memcpy(req->info, in_buf+(last_out_len-AES_BLOCK_SIZE),
AES_BLOCK_SIZE);
} }
return ret; return ret;
@ -513,8 +558,6 @@ static int mxs_dcp_run_sha(struct ahash_request *req)
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
struct dcp_async_ctx *actx = crypto_ahash_ctx(tfm); struct dcp_async_ctx *actx = crypto_ahash_ctx(tfm);
struct dcp_sha_req_ctx *rctx = ahash_request_ctx(req); struct dcp_sha_req_ctx *rctx = ahash_request_ctx(req);
struct hash_alg_common *halg = crypto_hash_alg_common(tfm);
struct dcp_dma_desc *desc = &sdcp->coh->desc[actx->chan]; struct dcp_dma_desc *desc = &sdcp->coh->desc[actx->chan];
dma_addr_t digest_phys = 0; dma_addr_t digest_phys = 0;
@ -536,10 +579,23 @@ static int mxs_dcp_run_sha(struct ahash_request *req)
desc->payload = 0; desc->payload = 0;
desc->status = 0; desc->status = 0;
/*
* Align driver with hw behavior when generating null hashes
*/
if (rctx->init && rctx->fini && desc->size == 0) {
struct hash_alg_common *halg = crypto_hash_alg_common(tfm);
const uint8_t *sha_buf =
(actx->alg == MXS_DCP_CONTROL1_HASH_SELECT_SHA1) ?
sha1_null_hash : sha256_null_hash;
memcpy(sdcp->coh->sha_out_buf, sha_buf, halg->digestsize);
ret = 0;
goto done_run;
}
/* Set HASH_TERM bit for last transfer block. */ /* Set HASH_TERM bit for last transfer block. */
if (rctx->fini) { if (rctx->fini) {
digest_phys = dma_map_single(sdcp->dev, req->result, digest_phys = dma_map_single(sdcp->dev, sdcp->coh->sha_out_buf,
halg->digestsize, DMA_FROM_DEVICE); DCP_SHA_PAY_SZ, DMA_FROM_DEVICE);
desc->control0 |= MXS_DCP_CONTROL0_HASH_TERM; desc->control0 |= MXS_DCP_CONTROL0_HASH_TERM;
desc->payload = digest_phys; desc->payload = digest_phys;
} }
@ -547,9 +603,10 @@ static int mxs_dcp_run_sha(struct ahash_request *req)
ret = mxs_dcp_start_dma(actx); ret = mxs_dcp_start_dma(actx);
if (rctx->fini) if (rctx->fini)
dma_unmap_single(sdcp->dev, digest_phys, halg->digestsize, dma_unmap_single(sdcp->dev, digest_phys, DCP_SHA_PAY_SZ,
DMA_FROM_DEVICE); DMA_FROM_DEVICE);
done_run:
dma_unmap_single(sdcp->dev, buf_phys, DCP_BUF_SZ, DMA_TO_DEVICE); dma_unmap_single(sdcp->dev, buf_phys, DCP_BUF_SZ, DMA_TO_DEVICE);
return ret; return ret;
@ -567,6 +624,7 @@ static int dcp_sha_req_to_buf(struct crypto_async_request *arq)
const int nents = sg_nents(req->src); const int nents = sg_nents(req->src);
uint8_t *in_buf = sdcp->coh->sha_in_buf; uint8_t *in_buf = sdcp->coh->sha_in_buf;
uint8_t *out_buf = sdcp->coh->sha_out_buf;
uint8_t *src_buf; uint8_t *src_buf;
@ -621,11 +679,9 @@ static int dcp_sha_req_to_buf(struct crypto_async_request *arq)
actx->fill = 0; actx->fill = 0;
/* For some reason, the result is flipped. */ /* For some reason the result is flipped */
for (i = 0; i < halg->digestsize / 2; i++) { for (i = 0; i < halg->digestsize; i++)
swap(req->result[i], req->result[i] = out_buf[halg->digestsize - i - 1];
req->result[halg->digestsize - i - 1]);
}
} }
return 0; return 0;

View File

@ -298,7 +298,7 @@ static void s5p_unset_indata(struct s5p_aes_dev *dev)
} }
static int s5p_make_sg_cpy(struct s5p_aes_dev *dev, struct scatterlist *src, static int s5p_make_sg_cpy(struct s5p_aes_dev *dev, struct scatterlist *src,
struct scatterlist **dst) struct scatterlist **dst)
{ {
void *pages; void *pages;
int len; int len;
@ -510,7 +510,7 @@ static int s5p_set_indata_start(struct s5p_aes_dev *dev,
} }
static int s5p_set_outdata_start(struct s5p_aes_dev *dev, static int s5p_set_outdata_start(struct s5p_aes_dev *dev,
struct ablkcipher_request *req) struct ablkcipher_request *req)
{ {
struct scatterlist *sg; struct scatterlist *sg;
int err; int err;

View File

@ -120,7 +120,7 @@ config DMA_JZ4740
config DMA_JZ4780 config DMA_JZ4780
tristate "JZ4780 DMA support" tristate "JZ4780 DMA support"
depends on MACH_JZ4780 || COMPILE_TEST depends on MIPS || COMPILE_TEST
select DMA_ENGINE select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS select DMA_VIRTUAL_CHANNELS
help help

View File

@ -580,7 +580,7 @@ static enum dma_status jz4780_dma_tx_status(struct dma_chan *chan,
to_jz4780_dma_desc(vdesc), 0); to_jz4780_dma_desc(vdesc), 0);
} else if (cookie == jzchan->desc->vdesc.tx.cookie) { } else if (cookie == jzchan->desc->vdesc.tx.cookie) {
txstate->residue = jz4780_dma_desc_residue(jzchan, jzchan->desc, txstate->residue = jz4780_dma_desc_residue(jzchan, jzchan->desc,
(jzchan->curr_hwdesc + 1) % jzchan->desc->count); jzchan->curr_hwdesc + 1);
} else } else
txstate->residue = 0; txstate->residue = 0;

View File

@ -129,7 +129,7 @@ static void
ioat_init_channel(struct ioatdma_device *ioat_dma, ioat_init_channel(struct ioatdma_device *ioat_dma,
struct ioatdma_chan *ioat_chan, int idx); struct ioatdma_chan *ioat_chan, int idx);
static void ioat_intr_quirk(struct ioatdma_device *ioat_dma); static void ioat_intr_quirk(struct ioatdma_device *ioat_dma);
static int ioat_enumerate_channels(struct ioatdma_device *ioat_dma); static void ioat_enumerate_channels(struct ioatdma_device *ioat_dma);
static int ioat3_dma_self_test(struct ioatdma_device *ioat_dma); static int ioat3_dma_self_test(struct ioatdma_device *ioat_dma);
static int ioat_dca_enabled = 1; static int ioat_dca_enabled = 1;
@ -573,7 +573,7 @@ static void ioat_dma_remove(struct ioatdma_device *ioat_dma)
* ioat_enumerate_channels - find and initialize the device's channels * ioat_enumerate_channels - find and initialize the device's channels
* @ioat_dma: the ioat dma device to be enumerated * @ioat_dma: the ioat dma device to be enumerated
*/ */
static int ioat_enumerate_channels(struct ioatdma_device *ioat_dma) static void ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
{ {
struct ioatdma_chan *ioat_chan; struct ioatdma_chan *ioat_chan;
struct device *dev = &ioat_dma->pdev->dev; struct device *dev = &ioat_dma->pdev->dev;
@ -592,7 +592,7 @@ static int ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
xfercap_log = readb(ioat_dma->reg_base + IOAT_XFERCAP_OFFSET); xfercap_log = readb(ioat_dma->reg_base + IOAT_XFERCAP_OFFSET);
xfercap_log &= 0x1f; /* bits [4:0] valid */ xfercap_log &= 0x1f; /* bits [4:0] valid */
if (xfercap_log == 0) if (xfercap_log == 0)
return 0; return;
dev_dbg(dev, "%s: xfercap = %d\n", __func__, 1 << xfercap_log); dev_dbg(dev, "%s: xfercap = %d\n", __func__, 1 << xfercap_log);
for (i = 0; i < dma->chancnt; i++) { for (i = 0; i < dma->chancnt; i++) {
@ -609,7 +609,6 @@ static int ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
} }
} }
dma->chancnt = i; dma->chancnt = i;
return i;
} }
/** /**

View File

@ -545,7 +545,7 @@ static struct dma_async_tx_descriptor *td_prep_slave_sg(struct dma_chan *chan,
} }
dma_sync_single_for_device(chan2dmadev(chan), td_desc->txd.phys, dma_sync_single_for_device(chan2dmadev(chan), td_desc->txd.phys,
td_desc->desc_list_len, DMA_MEM_TO_DEV); td_desc->desc_list_len, DMA_TO_DEVICE);
return &td_desc->txd; return &td_desc->txd;
} }

View File

@ -122,7 +122,7 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
BIT(offs % SYSCON_REG_BITS)); BIT(offs % SYSCON_REG_BITS));
} }
priv->data->set(chip, offset, val); chip->set(chip, offset, val);
return 0; return 0;
} }

View File

@ -38,9 +38,9 @@
#define INA3221_WARN3 0x0c #define INA3221_WARN3 0x0c
#define INA3221_MASK_ENABLE 0x0f #define INA3221_MASK_ENABLE 0x0f
#define INA3221_CONFIG_MODE_SHUNT BIT(1) #define INA3221_CONFIG_MODE_SHUNT BIT(0)
#define INA3221_CONFIG_MODE_BUS BIT(2) #define INA3221_CONFIG_MODE_BUS BIT(1)
#define INA3221_CONFIG_MODE_CONTINUOUS BIT(3) #define INA3221_CONFIG_MODE_CONTINUOUS BIT(2)
#define INA3221_RSHUNT_DEFAULT 10000 #define INA3221_RSHUNT_DEFAULT 10000

View File

@ -231,8 +231,12 @@ static int pwm_fan_probe(struct platform_device *pdev)
ctx->pwm = devm_of_pwm_get(&pdev->dev, pdev->dev.of_node, NULL); ctx->pwm = devm_of_pwm_get(&pdev->dev, pdev->dev.of_node, NULL);
if (IS_ERR(ctx->pwm)) { if (IS_ERR(ctx->pwm)) {
dev_err(&pdev->dev, "Could not get PWM\n"); ret = PTR_ERR(ctx->pwm);
return PTR_ERR(ctx->pwm);
if (ret != -EPROBE_DEFER)
dev_err(&pdev->dev, "Could not get PWM: %d\n", ret);
return ret;
} }
platform_set_drvdata(pdev, ctx); platform_set_drvdata(pdev, ctx);

View File

@ -35,6 +35,7 @@
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <asm/sections.h> #include <asm/sections.h>
#include <asm/local.h> #include <asm/local.h>
#include <asm/virt.h>
#include "coresight-etm4x.h" #include "coresight-etm4x.h"
#include "coresight-etm-perf.h" #include "coresight-etm-perf.h"
@ -615,7 +616,7 @@ static void etm4_set_default_config(struct etmv4_config *config)
config->vinst_ctrl |= BIT(0); config->vinst_ctrl |= BIT(0);
} }
static u64 etm4_get_access_type(struct etmv4_config *config) static u64 etm4_get_ns_access_type(struct etmv4_config *config)
{ {
u64 access_type = 0; u64 access_type = 0;
@ -626,17 +627,26 @@ static u64 etm4_get_access_type(struct etmv4_config *config)
* Bit[13] Exception level 1 - OS * Bit[13] Exception level 1 - OS
* Bit[14] Exception level 2 - Hypervisor * Bit[14] Exception level 2 - Hypervisor
* Bit[15] Never implemented * Bit[15] Never implemented
*
* Always stay away from hypervisor mode.
*/ */
access_type = ETM_EXLEVEL_NS_HYP; if (!is_kernel_in_hyp_mode()) {
/* Stay away from hypervisor mode for non-VHE */
if (config->mode & ETM_MODE_EXCL_KERN) access_type = ETM_EXLEVEL_NS_HYP;
access_type |= ETM_EXLEVEL_NS_OS; if (config->mode & ETM_MODE_EXCL_KERN)
access_type |= ETM_EXLEVEL_NS_OS;
} else if (config->mode & ETM_MODE_EXCL_KERN) {
access_type = ETM_EXLEVEL_NS_HYP;
}
if (config->mode & ETM_MODE_EXCL_USER) if (config->mode & ETM_MODE_EXCL_USER)
access_type |= ETM_EXLEVEL_NS_APP; access_type |= ETM_EXLEVEL_NS_APP;
return access_type;
}
static u64 etm4_get_access_type(struct etmv4_config *config)
{
u64 access_type = etm4_get_ns_access_type(config);
/* /*
* EXLEVEL_S, bits[11:8], don't trace anything happening * EXLEVEL_S, bits[11:8], don't trace anything happening
* in secure state. * in secure state.
@ -890,20 +900,10 @@ void etm4_config_trace_mode(struct etmv4_config *config)
addr_acc = config->addr_acc[ETM_DEFAULT_ADDR_COMP]; addr_acc = config->addr_acc[ETM_DEFAULT_ADDR_COMP];
/* clear default config */ /* clear default config */
addr_acc &= ~(ETM_EXLEVEL_NS_APP | ETM_EXLEVEL_NS_OS); addr_acc &= ~(ETM_EXLEVEL_NS_APP | ETM_EXLEVEL_NS_OS |
ETM_EXLEVEL_NS_HYP);
/* addr_acc |= etm4_get_ns_access_type(config);
* EXLEVEL_NS, bits[15:12]
* The Exception levels are:
* Bit[12] Exception level 0 - Application
* Bit[13] Exception level 1 - OS
* Bit[14] Exception level 2 - Hypervisor
* Bit[15] Never implemented
*/
if (mode & ETM_MODE_EXCL_KERN)
addr_acc |= ETM_EXLEVEL_NS_OS;
else
addr_acc |= ETM_EXLEVEL_NS_APP;
config->addr_acc[ETM_DEFAULT_ADDR_COMP] = addr_acc; config->addr_acc[ETM_DEFAULT_ADDR_COMP] = addr_acc;
config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] = addr_acc; config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] = addr_acc;

View File

@ -415,10 +415,10 @@ static void tmc_update_etf_buffer(struct coresight_device *csdev,
case TMC_MEM_INTF_WIDTH_32BITS: case TMC_MEM_INTF_WIDTH_32BITS:
case TMC_MEM_INTF_WIDTH_64BITS: case TMC_MEM_INTF_WIDTH_64BITS:
case TMC_MEM_INTF_WIDTH_128BITS: case TMC_MEM_INTF_WIDTH_128BITS:
mask = GENMASK(31, 5); mask = GENMASK(31, 4);
break; break;
case TMC_MEM_INTF_WIDTH_256BITS: case TMC_MEM_INTF_WIDTH_256BITS:
mask = GENMASK(31, 6); mask = GENMASK(31, 5);
break; break;
} }

View File

@ -132,12 +132,14 @@ static int coresight_enable_sink(struct coresight_device *csdev, u32 mode)
{ {
int ret; int ret;
if (!csdev->enable) { /*
if (sink_ops(csdev)->enable) { * We need to make sure the "new" session is compatible with the
ret = sink_ops(csdev)->enable(csdev, mode); * existing "mode" of operation.
if (ret) */
return ret; if (sink_ops(csdev)->enable) {
} ret = sink_ops(csdev)->enable(csdev, mode);
if (ret)
return ret;
csdev->enable = true; csdev->enable = true;
} }
@ -331,8 +333,14 @@ int coresight_enable_path(struct list_head *path, u32 mode)
switch (type) { switch (type) {
case CORESIGHT_DEV_TYPE_SINK: case CORESIGHT_DEV_TYPE_SINK:
ret = coresight_enable_sink(csdev, mode); ret = coresight_enable_sink(csdev, mode);
/*
* Sink is the first component turned on. If we
* failed to enable the sink, there are no components
* that need disabling. Disabling the path here
* would mean we could disrupt an existing session.
*/
if (ret) if (ret)
goto err; goto out;
break; break;
case CORESIGHT_DEV_TYPE_SOURCE: case CORESIGHT_DEV_TYPE_SOURCE:
/* sources are enabled from either sysFS or Perf */ /* sources are enabled from either sysFS or Perf */

View File

@ -397,12 +397,13 @@ config I2C_BCM_KONA
If you do not need KONA I2C interface, say N. If you do not need KONA I2C interface, say N.
config I2C_BRCMSTB config I2C_BRCMSTB
tristate "BRCM Settop I2C controller" tristate "BRCM Settop/DSL I2C controller"
depends on ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM_63XX || \
COMPILE_TEST
default y default y
help help
If you say yes to this option, support will be included for the If you say yes to this option, support will be included for the
I2C interface on the Broadcom Settop SoCs. I2C interface on the Broadcom Settop/DSL SoCs.
If you do not need I2C interface, say N. If you do not need I2C interface, say N.

View File

@ -94,17 +94,22 @@ static int mcp4922_write_raw(struct iio_dev *indio_dev,
long mask) long mask)
{ {
struct mcp4922_state *state = iio_priv(indio_dev); struct mcp4922_state *state = iio_priv(indio_dev);
int ret;
if (val2 != 0) if (val2 != 0)
return -EINVAL; return -EINVAL;
switch (mask) { switch (mask) {
case IIO_CHAN_INFO_RAW: case IIO_CHAN_INFO_RAW:
if (val > GENMASK(chan->scan_type.realbits-1, 0)) if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
return -EINVAL; return -EINVAL;
val <<= chan->scan_type.shift; val <<= chan->scan_type.shift;
state->value[chan->channel] = val;
return mcp4922_spi_write(state, chan->channel, val); ret = mcp4922_spi_write(state, chan->channel, val);
if (!ret)
state->value[chan->channel] = val;
return ret;
default: default:
return -EINVAL; return -EINVAL;
} }

View File

@ -377,7 +377,9 @@ int pcie_speeds(struct hfi1_devdata *dd)
/* /*
* bus->max_bus_speed is set from the bridge's linkcap Max Link Speed * bus->max_bus_speed is set from the bridge's linkcap Max Link Speed
*/ */
if (parent && dd->pcidev->bus->max_bus_speed != PCIE_SPEED_8_0GT) { if (parent &&
(dd->pcidev->bus->max_bus_speed == PCIE_SPEED_2_5GT ||
dd->pcidev->bus->max_bus_speed == PCIE_SPEED_5_0GT)) {
dd_dev_info(dd, "Parent PCIe bridge does not support Gen3\n"); dd_dev_info(dd, "Parent PCIe bridge does not support Gen3\n");
dd->link_gen3_capable = 0; dd->link_gen3_capable = 0;
} }

View File

@ -1652,7 +1652,7 @@ static enum i40iw_status_code i40iw_add_mqh_6(struct i40iw_device *iwdev,
unsigned long flags; unsigned long flags;
rtnl_lock(); rtnl_lock();
for_each_netdev_rcu(&init_net, ip_dev) { for_each_netdev(&init_net, ip_dev) {
if ((((rdma_vlan_dev_vlan_id(ip_dev) < I40IW_NO_VLAN) && if ((((rdma_vlan_dev_vlan_id(ip_dev) < I40IW_NO_VLAN) &&
(rdma_vlan_dev_real_dev(ip_dev) == iwdev->netdev)) || (rdma_vlan_dev_real_dev(ip_dev) == iwdev->netdev)) ||
(ip_dev == iwdev->netdev)) && (ip_dev->flags & IFF_UP)) { (ip_dev == iwdev->netdev)) && (ip_dev->flags & IFF_UP)) {

View File

@ -989,7 +989,8 @@ static int __mthca_init_one(struct pci_dev *pdev, int hca_type)
goto err_free_dev; goto err_free_dev;
} }
if (mthca_cmd_init(mdev)) { err = mthca_cmd_init(mdev);
if (err) {
mthca_err(mdev, "Failed to init command interface, aborting.\n"); mthca_err(mdev, "Failed to init command interface, aborting.\n");
goto err_free_dev; goto err_free_dev;
} }

View File

@ -250,6 +250,17 @@ static inline enum comp_state check_ack(struct rxe_qp *qp,
case IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE: case IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE:
if (pkt->opcode != IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE && if (pkt->opcode != IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE &&
pkt->opcode != IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST) { pkt->opcode != IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST) {
/* read retries of partial data may restart from
* read response first or response only.
*/
if ((pkt->psn == wqe->first_psn &&
pkt->opcode ==
IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) ||
(wqe->first_psn == wqe->last_psn &&
pkt->opcode ==
IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY))
break;
return COMPST_ERROR; return COMPST_ERROR;
} }
break; break;
@ -486,11 +497,11 @@ static inline enum comp_state complete_wqe(struct rxe_qp *qp,
struct rxe_pkt_info *pkt, struct rxe_pkt_info *pkt,
struct rxe_send_wqe *wqe) struct rxe_send_wqe *wqe)
{ {
qp->comp.opcode = -1; if (pkt && wqe->state == wqe_state_pending) {
if (psn_compare(wqe->last_psn, qp->comp.psn) >= 0) {
if (pkt) { qp->comp.psn = (wqe->last_psn + 1) & BTH_PSN_MASK;
if (psn_compare(pkt->psn, qp->comp.psn) >= 0) qp->comp.opcode = -1;
qp->comp.psn = (pkt->psn + 1) & BTH_PSN_MASK; }
if (qp->req.wait_psn) { if (qp->req.wait_psn) {
qp->req.wait_psn = 0; qp->req.wait_psn = 0;

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