Merge commit 'AU_LINUX_ANDROID_ICS.04.00.04.00.130' into msm-3.4
* commit 'AU_LINUX_ANDROID_ICS.04.00.04.00.130': (39 commits) msm: vidc: Add support for DIVX 4/5/6 msm_fb: display: Set the minimal sleep time for DSI PHY Initialisation board: 8930: add debounce interval for gpio-keys regulator: Extend of_get_regulator_init_data to support non-DT consumers regulator: pm8xxx-regulator: Add slew_rate platform data parameter crypto: Fix initialization of array variable. arm: free all .init memory when CONFIG_STRICT_MEMORY_RWX is set msm: clock-copper: Remove block reset ability from most clocks msm: clock-local2: Fix local_vote_clk_reset to use right to_*_clk macro EHCI: HSIC: Add support for suspend, resume and URB logging arm/dt: msm-pm8941: Change boost regulator register address to 0xA000 msm: camera: Move server code into seperate file. msm: camera: Close camera gracefully in case of userspace crash media: dvb: mpq: Support getting decoder's buffer status Bluetooth: Wait for wcnss to be ready after SSR msm: msm_sdcc: Add device tree support for SDCC controllers msm: display: Change DSI escape clock to byte clock msm: clock-8960: Change source of DSI escape clock to byte clock ASOC: msm: Enable mpq8064 machine driver. EHCI: HSIC: Set the interrupt threshold control value to 8ms ... Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
This commit is contained in:
commit
f066380a08
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@ -10,6 +10,11 @@ Optional properties:
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|||
- regulator-always-on: boolean, regulator should never be disabled
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- regulator-boot-on: bootloader/firmware enabled regulator
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- <name>-supply: phandle to the parent supply/regulator node
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- qcom,consumer-supplies: flattened list of supply and dev_name pairs
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This property is used to support regulator consumers that have no device
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tree node. An empty string, "", can be used to specify a null device
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name. A null device name is used to allow calls such as:
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regulator_get(NULL, "pll_vdd").
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Example:
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|
@ -18,6 +23,7 @@ Example:
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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vin-supply = <&vin>;
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qcom,consumer-supplies = "pll_vdd", "", "lcd_vcc", "foo.1";
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};
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Regulator Consumers:
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|
|
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@ -315,9 +315,9 @@
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};
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};
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regulator@1d00 {
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regulator@a000 {
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regulator-name = "8941_boost";
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reg = <0x1d00 0x100>;
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reg = <0xa000 0x100>;
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compatible = "qcom,qpnp-regulator";
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status = "disabled";
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};
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@ -41,7 +41,7 @@
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status = "okay";
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};
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pm8941_boost: regulator@1d00 {
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pm8941_boost: regulator@a000 {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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qcom,enable-time = <500>;
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@ -31,17 +31,17 @@
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};
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qcom,sdcc@f9824000 {
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status = "disable";
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};
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qcom,sdcc-clk-rates = <400000 19200000>;
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};
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qcom,sdcc@f98a4000 {
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qcom,sdcc-clk-rates = <400000 19200000>;
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};
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qcom,sdcc@f9864000 {
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status = "disable";
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};
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qcom,sdcc@f98a4000 {
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status = "disable";
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};
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qcom,sdcc@f98e4000 {
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status = "disable";
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};
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@ -47,6 +47,7 @@ CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
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CONFIG_MSM_PIL_LPASS_QDSP6V5=y
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CONFIG_MSM_TZ_LOG=y
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CONFIG_MSM_PIL_PRONTO=y
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CONFIG_MSM_IOMMU=y
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CONFIG_MSM_DIRECT_SCLK_ACCESS=y
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CONFIG_MSM_OCMEM=y
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CONFIG_NO_HZ=y
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@ -13,6 +13,11 @@
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struct mtd_partition;
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struct mtd_info;
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enum sw_version {
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VERSION_1 = 0,
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VERSION_2,
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};
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/*
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* map_name: the map probe function name
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* name: flash device name (eg, as used with mtdparts=)
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@ -24,6 +29,7 @@ struct mtd_info;
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* mmcontrol: method called to enable or disable Sync. Burst Read in OneNAND
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* parts: optional array of mtd_partitions for static partitioning
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* nr_parts: number of mtd_partitions for static partitoning
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* version: software register interface version
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*/
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struct flash_platform_data {
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const char *map_name;
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@ -36,6 +42,7 @@ struct flash_platform_data {
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void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
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struct mtd_partition *parts;
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unsigned int nr_parts;
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enum sw_version version;
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};
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#endif
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@ -311,6 +311,8 @@ ifdef CONFIG_MSM_RPM
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obj-$(CONFIG_ARCH_MSM8960) += rpm_resources.o
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obj-$(CONFIG_ARCH_MSM8X60) += rpm_resources.o
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obj-$(CONFIG_ARCH_MSM9615) += rpm_resources.o
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endif
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ifdef CONFIG_MSM_RPM_SMD
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obj-$(CONFIG_ARCH_MSMCOPPER) += lpm_levels.o
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endif
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obj-$(CONFIG_MSM_MPM) += mpm.o
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@ -227,7 +227,7 @@ static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
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};
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static int mdp_core_clk_rate_table[] = {
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85330000,
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59080000,
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128000000,
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160000000,
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200000000,
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@ -235,7 +235,7 @@ static int mdp_core_clk_rate_table[] = {
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static struct msm_panel_common_pdata mdp_pdata = {
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.gpio = MDP_VSYNC_GPIO,
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.mdp_core_clk_rate = 85330000,
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.mdp_core_clk_rate = 59080000,
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.mdp_core_clk_table = mdp_core_clk_rate_table,
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.num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
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.mdp_bus_scale_table = &mdp_bus_scale_pdata,
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@ -1023,6 +1023,151 @@ static struct msm_gpiomux_config sx150x_int_configs[] __initdata = {
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},
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};
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#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
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static struct gpiomux_setting sdc2_clk_active_cfg = {
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.func = GPIOMUX_FUNC_2,
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.drv = GPIOMUX_DRV_8MA,
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.pull = GPIOMUX_PULL_NONE,
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};
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static struct gpiomux_setting sdc2_cmd_data_0_3_active_cfg = {
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.func = GPIOMUX_FUNC_2,
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.drv = GPIOMUX_DRV_8MA,
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.pull = GPIOMUX_PULL_UP,
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};
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static struct gpiomux_setting sdc2_suspended_cfg = {
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.func = GPIOMUX_FUNC_GPIO,
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.drv = GPIOMUX_DRV_2MA,
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.pull = GPIOMUX_PULL_DOWN,
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};
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static struct gpiomux_setting sdc2_data_1_suspended_cfg = {
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.func = GPIOMUX_FUNC_GPIO,
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.drv = GPIOMUX_DRV_2MA,
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.pull = GPIOMUX_PULL_UP,
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};
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static struct msm_gpiomux_config apq8064_sdc2_configs[] __initdata = {
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{
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.gpio = 59,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc2_clk_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc2_suspended_cfg,
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},
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},
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{
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.gpio = 57,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc2_cmd_data_0_3_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc2_suspended_cfg,
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},
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},
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{
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.gpio = 62,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc2_cmd_data_0_3_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc2_suspended_cfg,
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},
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},
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{
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.gpio = 61,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc2_cmd_data_0_3_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc2_data_1_suspended_cfg,
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},
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},
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{
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.gpio = 60,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc2_cmd_data_0_3_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc2_suspended_cfg,
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},
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},
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{
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.gpio = 58,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc2_cmd_data_0_3_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc2_suspended_cfg,
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},
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},
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};
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#endif
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#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
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static struct gpiomux_setting sdc4_clk_active_cfg = {
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.func = GPIOMUX_FUNC_2,
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.drv = GPIOMUX_DRV_8MA,
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.pull = GPIOMUX_PULL_NONE,
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};
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static struct gpiomux_setting sdc4_cmd_data_0_3_active_cfg = {
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.func = GPIOMUX_FUNC_2,
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.drv = GPIOMUX_DRV_8MA,
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.pull = GPIOMUX_PULL_UP,
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};
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static struct gpiomux_setting sdc4_suspended_cfg = {
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.func = GPIOMUX_FUNC_GPIO,
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.drv = GPIOMUX_DRV_2MA,
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.pull = GPIOMUX_PULL_DOWN,
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};
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static struct gpiomux_setting sdc4_data_1_suspended_cfg = {
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.func = GPIOMUX_FUNC_GPIO,
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.drv = GPIOMUX_DRV_2MA,
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.pull = GPIOMUX_PULL_UP,
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};
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static struct msm_gpiomux_config apq8064_sdc4_configs[] __initdata = {
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{
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.gpio = 68,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc4_clk_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc4_suspended_cfg,
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},
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},
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{
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.gpio = 67,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc4_suspended_cfg,
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},
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},
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{
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.gpio = 66,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc4_suspended_cfg,
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},
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},
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{
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.gpio = 65,
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.settings = {
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[GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_active_cfg,
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[GPIOMUX_SUSPENDED] = &sdc4_data_1_suspended_cfg,
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||||
},
|
||||
},
|
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{
|
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.gpio = 64,
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||||
.settings = {
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||||
[GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_active_cfg,
|
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[GPIOMUX_SUSPENDED] = &sdc4_suspended_cfg,
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},
|
||||
},
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||||
{
|
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.gpio = 63,
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.settings = {
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||||
[GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_active_cfg,
|
||||
[GPIOMUX_SUSPENDED] = &sdc4_suspended_cfg,
|
||||
},
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
void __init apq8064_init_gpiomux(void)
|
||||
{
|
||||
int rc;
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||||
|
@ -1104,4 +1249,14 @@ void __init apq8064_init_gpiomux(void)
|
|||
if (machine_is_mpq8064_cdp())
|
||||
msm_gpiomux_install(mpq8064_ir_configs,
|
||||
ARRAY_SIZE(mpq8064_ir_configs));
|
||||
|
||||
#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
|
||||
msm_gpiomux_install(apq8064_sdc2_configs,
|
||||
ARRAY_SIZE(apq8064_sdc2_configs));
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
|
||||
msm_gpiomux_install(apq8064_sdc4_configs,
|
||||
ARRAY_SIZE(apq8064_sdc4_configs));
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -188,13 +188,50 @@ static struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct msm_mmc_gpio sdc2_gpio[] = {
|
||||
{59, "sdc2_clk"},
|
||||
{57, "sdc2_cmd"},
|
||||
{62, "sdc2_dat_0"},
|
||||
{61, "sdc2_dat_1"},
|
||||
{60, "sdc2_dat_2"},
|
||||
{58, "sdc2_dat_3"},
|
||||
};
|
||||
|
||||
static struct msm_mmc_gpio sdc4_gpio[] = {
|
||||
{68, "sdc4_clk"},
|
||||
{67, "sdc4_cmd"},
|
||||
{66, "sdc4_dat_0"},
|
||||
{65, "sdc4_dat_1"},
|
||||
{64, "sdc4_dat_2"},
|
||||
{63, "sdc4_dat_3"},
|
||||
};
|
||||
|
||||
static struct msm_mmc_gpio_data mmc_gpio_data[MAX_SDCC_CONTROLLER] = {
|
||||
[SDCC2] = {
|
||||
.gpio = sdc2_gpio,
|
||||
.size = ARRAY_SIZE(sdc2_gpio),
|
||||
},
|
||||
[SDCC4] = {
|
||||
.gpio = sdc4_gpio,
|
||||
.size = ARRAY_SIZE(sdc4_gpio),
|
||||
}
|
||||
};
|
||||
|
||||
static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
|
||||
[SDCC1] = {
|
||||
.pad_data = &mmc_pad_data[SDCC1],
|
||||
},
|
||||
[SDCC2] = {
|
||||
.is_gpio = 1,
|
||||
.gpio_data = &mmc_gpio_data[SDCC2],
|
||||
},
|
||||
[SDCC3] = {
|
||||
.pad_data = &mmc_pad_data[SDCC3],
|
||||
},
|
||||
[SDCC4] = {
|
||||
.is_gpio = 1,
|
||||
.gpio_data = &mmc_gpio_data[SDCC4],
|
||||
},
|
||||
};
|
||||
|
||||
#define MSM_MPM_PIN_SDC1_DAT1 17
|
||||
|
@ -227,6 +264,26 @@ static struct mmc_platform_data *apq8064_sdc1_pdata = &sdc1_data;
|
|||
static struct mmc_platform_data *apq8064_sdc1_pdata;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
|
||||
static unsigned int sdc2_sup_clk_rates[] = {
|
||||
400000, 24000000, 48000000
|
||||
};
|
||||
|
||||
static struct mmc_platform_data sdc2_data = {
|
||||
.ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
|
||||
.mmc_bus_width = MMC_CAP_4_BIT_DATA,
|
||||
.sup_clk_table = sdc2_sup_clk_rates,
|
||||
.sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
|
||||
.pclk_src_dfab = 1,
|
||||
.pin_data = &mmc_slot_pin_data[SDCC2],
|
||||
.sdiowakeup_irq = MSM_GPIO_TO_INT(61),
|
||||
.msm_bus_voting_data = &sps_to_ddr_bus_voting_data,
|
||||
};
|
||||
static struct mmc_platform_data *apq8064_sdc2_pdata = &sdc2_data;
|
||||
#else
|
||||
static struct mmc_platform_data *apq8064_sdc2_pdata;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
|
||||
static unsigned int sdc3_sup_clk_rates[] = {
|
||||
400000, 24000000, 48000000, 96000000, 192000000
|
||||
|
@ -258,6 +315,27 @@ static struct mmc_platform_data *apq8064_sdc3_pdata = &sdc3_data;
|
|||
static struct mmc_platform_data *apq8064_sdc3_pdata;
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
|
||||
static unsigned int sdc4_sup_clk_rates[] = {
|
||||
400000, 24000000, 48000000
|
||||
};
|
||||
|
||||
static struct mmc_platform_data sdc4_data = {
|
||||
.ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
|
||||
.mmc_bus_width = MMC_CAP_4_BIT_DATA,
|
||||
.sup_clk_table = sdc4_sup_clk_rates,
|
||||
.sup_clk_cnt = ARRAY_SIZE(sdc4_sup_clk_rates),
|
||||
.pclk_src_dfab = 1,
|
||||
.pin_data = &mmc_slot_pin_data[SDCC4],
|
||||
.sdiowakeup_irq = MSM_GPIO_TO_INT(65),
|
||||
.msm_bus_voting_data = &sps_to_ddr_bus_voting_data,
|
||||
};
|
||||
static struct mmc_platform_data *apq8064_sdc4_pdata = &sdc4_data;
|
||||
#else
|
||||
static struct mmc_platform_data *apq8064_sdc4_pdata;
|
||||
#endif
|
||||
|
||||
void __init apq8064_init_mmc(void)
|
||||
{
|
||||
if ((machine_is_apq8064_rumi3()) || machine_is_apq8064_sim()) {
|
||||
|
@ -278,6 +356,9 @@ void __init apq8064_init_mmc(void)
|
|||
if (apq8064_sdc1_pdata)
|
||||
apq8064_add_sdcc(1, apq8064_sdc1_pdata);
|
||||
|
||||
if (apq8064_sdc2_pdata)
|
||||
apq8064_add_sdcc(2, apq8064_sdc2_pdata);
|
||||
|
||||
if (apq8064_sdc3_pdata) {
|
||||
if (!machine_is_apq8064_cdp()) {
|
||||
apq8064_sdc3_pdata->wpswitch_gpio = 0;
|
||||
|
@ -292,4 +373,7 @@ void __init apq8064_init_mmc(void)
|
|||
}
|
||||
apq8064_add_sdcc(3, apq8064_sdc3_pdata);
|
||||
}
|
||||
|
||||
if (apq8064_sdc4_pdata)
|
||||
apq8064_add_sdcc(4, apq8064_sdc4_pdata);
|
||||
}
|
||||
|
|
|
@ -2192,6 +2192,7 @@ static struct platform_device *common_devices[] __initdata = {
|
|||
&apq8064_rpm_device,
|
||||
&apq8064_rpm_log_device,
|
||||
&apq8064_rpm_stat_device,
|
||||
&apq_device_tz_log,
|
||||
&msm_bus_8064_apps_fabric,
|
||||
&msm_bus_8064_sys_fabric,
|
||||
&msm_bus_8064_mm_fabric,
|
||||
|
|
|
@ -1789,6 +1789,7 @@ static struct gpio_keys_button keys_8930[] = {
|
|||
.gpio = GPIO_VOLUME_UP,
|
||||
.wakeup = 1,
|
||||
.active_low = 1,
|
||||
.debounce_interval = 15,
|
||||
},
|
||||
{
|
||||
.code = KEY_VOLUMEDOWN,
|
||||
|
@ -1797,6 +1798,7 @@ static struct gpio_keys_button keys_8930[] = {
|
|||
.gpio = GPIO_VOLUME_DOWN,
|
||||
.wakeup = 1,
|
||||
.active_low = 1,
|
||||
.debounce_interval = 15,
|
||||
},
|
||||
{
|
||||
.code = KEY_CAMERA_FOCUS,
|
||||
|
@ -1805,6 +1807,7 @@ static struct gpio_keys_button keys_8930[] = {
|
|||
.gpio = GPIO_CAMERA_FOCUS,
|
||||
.wakeup = 1,
|
||||
.active_low = 1,
|
||||
.debounce_interval = 15,
|
||||
},
|
||||
{
|
||||
.code = KEY_CAMERA_SNAPSHOT,
|
||||
|
@ -1813,6 +1816,7 @@ static struct gpio_keys_button keys_8930[] = {
|
|||
.gpio = GPIO_CAMERA_SNAPSHOT,
|
||||
.wakeup = 1,
|
||||
.active_low = 1,
|
||||
.debounce_interval = 15,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -637,8 +637,9 @@ static struct platform_device android_pmem_device = {
|
|||
static u32 msm_calculate_batt_capacity(u32 current_voltage);
|
||||
|
||||
static struct msm_psy_batt_pdata msm_psy_batt_data = {
|
||||
.voltage_min_design = 2800,
|
||||
.voltage_max_design = 4300,
|
||||
.voltage_min_design = 3200,
|
||||
.voltage_max_design = 4200,
|
||||
.voltage_fail_safe = 3340,
|
||||
.avail_chg_sources = AC_CHG | USB_CHG ,
|
||||
.batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
|
||||
.calculate_capacity = &msm_calculate_batt_capacity,
|
||||
|
|
|
@ -582,8 +582,9 @@ static struct platform_device android_pmem_device = {
|
|||
static u32 msm_calculate_batt_capacity(u32 current_voltage);
|
||||
|
||||
static struct msm_psy_batt_pdata msm_psy_batt_data = {
|
||||
.voltage_min_design = 2800,
|
||||
.voltage_max_design = 4300,
|
||||
.voltage_min_design = 3200,
|
||||
.voltage_max_design = 4200,
|
||||
.voltage_fail_safe = 3340,
|
||||
.avail_chg_sources = AC_CHG | USB_CHG ,
|
||||
.batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
|
||||
.calculate_capacity = &msm_calculate_batt_capacity,
|
||||
|
|
|
@ -6107,6 +6107,9 @@ static void __init reg_init(void)
|
|||
if (cpu_is_msm8960() || cpu_is_apq8064())
|
||||
rmwreg(0x2, DSI2_BYTE_NS_REG, 0x7);
|
||||
|
||||
/* Source the dsi1_esc_clk from the DSI1 PHY PLLs */
|
||||
rmwreg(0x1, DSI1_ESC_NS_REG, 0x7);
|
||||
|
||||
/*
|
||||
* Source the sata_phy_ref_clk from PXO and set predivider of
|
||||
* sata_pmalive_clk to 1.
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -462,14 +462,16 @@ static enum handoff branch_clk_handoff(struct clk *c)
|
|||
}
|
||||
|
||||
static int __branch_clk_reset(void __iomem *bcr_reg,
|
||||
enum clk_reset_action action)
|
||||
enum clk_reset_action action, const char *name)
|
||||
{
|
||||
int ret = 0;
|
||||
unsigned long flags;
|
||||
u32 reg_val;
|
||||
|
||||
if (!bcr_reg)
|
||||
if (!bcr_reg) {
|
||||
WARN("clk_reset called on an unsupported clock (%s)\n", name);
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&local_clock_reg_lock, flags);
|
||||
reg_val = readl_relaxed(bcr_reg);
|
||||
|
@ -495,7 +497,7 @@ static int __branch_clk_reset(void __iomem *bcr_reg,
|
|||
static int branch_clk_reset(struct clk *c, enum clk_reset_action action)
|
||||
{
|
||||
struct branch_clk *branch = to_branch_clk(c);
|
||||
return __branch_clk_reset(BCR_REG(branch), action);
|
||||
return __branch_clk_reset(BCR_REG(branch), action, c->dbg_name);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -503,8 +505,8 @@ static int branch_clk_reset(struct clk *c, enum clk_reset_action action)
|
|||
*/
|
||||
static int local_vote_clk_reset(struct clk *c, enum clk_reset_action action)
|
||||
{
|
||||
struct branch_clk *vclk = to_branch_clk(c);
|
||||
return __branch_clk_reset(BCR_REG(vclk), action);
|
||||
struct local_vote_clk *vclk = to_local_vote_clk(c);
|
||||
return __branch_clk_reset(BCR_REG(vclk), action, c->dbg_name);
|
||||
}
|
||||
|
||||
static int local_vote_clk_enable(struct clk *c)
|
||||
|
|
|
@ -850,6 +850,22 @@ struct platform_device apq8064_device_ehci_host4 = {
|
|||
},
|
||||
};
|
||||
|
||||
#define SHARED_IMEM_TZ_BASE 0x2a03f720
|
||||
static struct resource tzlog_resources[] = {
|
||||
{
|
||||
.start = SHARED_IMEM_TZ_BASE,
|
||||
.end = SHARED_IMEM_TZ_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device apq_device_tz_log = {
|
||||
.name = "tz_log",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(tzlog_resources),
|
||||
.resource = tzlog_resources,
|
||||
};
|
||||
|
||||
/* MSM Video core device */
|
||||
#ifdef CONFIG_MSM_BUS_SCALING
|
||||
static struct msm_bus_vectors vidc_init_vectors[] = {
|
||||
|
|
|
@ -627,8 +627,7 @@ static struct resource resources_nand[] = {
|
|||
};
|
||||
|
||||
struct flash_platform_data msm_nand_data = {
|
||||
.parts = NULL,
|
||||
.nr_parts = 0,
|
||||
.version = VERSION_2,
|
||||
};
|
||||
|
||||
struct platform_device msm_device_nand = {
|
||||
|
|
|
@ -417,7 +417,9 @@ static struct resource resources_nand[] = {
|
|||
},
|
||||
};
|
||||
|
||||
struct flash_platform_data msm_nand_data;
|
||||
struct flash_platform_data msm_nand_data = {
|
||||
.version = VERSION_2,
|
||||
};
|
||||
|
||||
struct platform_device msm_device_nand = {
|
||||
.name = "msm_nand",
|
||||
|
|
|
@ -655,9 +655,7 @@ struct platform_device msm_device_otg = {
|
|||
};
|
||||
|
||||
struct flash_platform_data msm_nand_data = {
|
||||
.parts = NULL,
|
||||
.nr_parts = 0,
|
||||
.interleave = 0,
|
||||
.version = VERSION_2,
|
||||
};
|
||||
|
||||
struct platform_device msm_device_nand = {
|
||||
|
|
|
@ -401,3 +401,5 @@ extern struct platform_device apq8064_cache_dump_device;
|
|||
extern struct platform_device copper_device_tz_log;
|
||||
|
||||
extern struct platform_device mdm_sglte_device;
|
||||
|
||||
extern struct platform_device apq_device_tz_log;
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
struct msm_psy_batt_pdata {
|
||||
u32 voltage_max_design;
|
||||
u32 voltage_min_design;
|
||||
u32 voltage_fail_safe;
|
||||
u32 avail_chg_sources;
|
||||
u32 batt_technology;
|
||||
u32 (*calculate_capacity)(u32 voltage);
|
||||
|
|
|
@ -176,7 +176,7 @@ static struct msm_iova_data *find_domain(int domain_num)
|
|||
node = rb_entry(p, struct msm_iova_data, node);
|
||||
if (domain_num < node->domain_num)
|
||||
p = p->rb_left;
|
||||
else if (domain_num > domain_num)
|
||||
else if (domain_num > node->domain_num)
|
||||
p = p->rb_right;
|
||||
else {
|
||||
mutex_unlock(&domain_mutex);
|
||||
|
|
|
@ -53,6 +53,7 @@ struct msm_ipc_router_smd_xprt {
|
|||
struct delayed_work read_work;
|
||||
spinlock_t ss_reset_lock; /*Subsystem reset lock*/
|
||||
int ss_reset;
|
||||
void *pil;
|
||||
};
|
||||
|
||||
struct msm_ipc_router_smd_xprt_work {
|
||||
|
@ -203,10 +204,16 @@ static int msm_ipc_router_smd_remote_write(void *data,
|
|||
|
||||
static int msm_ipc_router_smd_remote_close(struct msm_ipc_router_xprt *xprt)
|
||||
{
|
||||
int rc;
|
||||
struct msm_ipc_router_smd_xprt *smd_xprtp =
|
||||
container_of(xprt, struct msm_ipc_router_smd_xprt, xprt);
|
||||
|
||||
return smd_close(smd_xprtp->channel);
|
||||
rc = smd_close(smd_xprtp->channel);
|
||||
if (smd_xprtp->pil) {
|
||||
pil_put(smd_xprtp->pil);
|
||||
smd_xprtp->pil = NULL;
|
||||
}
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void smd_xprt_read_data(struct work_struct *work)
|
||||
|
@ -388,6 +395,23 @@ static void msm_ipc_router_smd_remote_notify(void *_dev, unsigned event)
|
|||
}
|
||||
}
|
||||
|
||||
static void *msm_ipc_load_subsystem(uint32_t edge)
|
||||
{
|
||||
void *pil = NULL;
|
||||
const char *peripheral;
|
||||
|
||||
peripheral = smd_edge_to_subsystem(edge);
|
||||
if (peripheral) {
|
||||
pil = pil_get(peripheral);
|
||||
if (IS_ERR(pil)) {
|
||||
pr_err("%s: Failed to load %s\n",
|
||||
__func__, peripheral);
|
||||
pil = NULL;
|
||||
}
|
||||
}
|
||||
return pil;
|
||||
}
|
||||
|
||||
static int msm_ipc_router_smd_remote_probe(struct platform_device *pdev)
|
||||
{
|
||||
int rc;
|
||||
|
@ -425,6 +449,8 @@ static int msm_ipc_router_smd_remote_probe(struct platform_device *pdev)
|
|||
spin_lock_init(&smd_remote_xprt[id].ss_reset_lock);
|
||||
smd_remote_xprt[id].ss_reset = 0;
|
||||
|
||||
smd_remote_xprt[id].pil = msm_ipc_load_subsystem(
|
||||
smd_xprt_cfg[id].edge);
|
||||
rc = smd_named_open_on_edge(smd_xprt_cfg[id].ch_name,
|
||||
smd_xprt_cfg[id].edge,
|
||||
&smd_remote_xprt[id].channel,
|
||||
|
@ -433,6 +459,10 @@ static int msm_ipc_router_smd_remote_probe(struct platform_device *pdev)
|
|||
if (rc < 0) {
|
||||
pr_err("%s: Channel open failed for %s\n",
|
||||
__func__, smd_xprt_cfg[id].ch_name);
|
||||
if (smd_remote_xprt[id].pil) {
|
||||
pil_put(smd_remote_xprt[id].pil);
|
||||
smd_remote_xprt[id].pil = NULL;
|
||||
}
|
||||
destroy_workqueue(smd_remote_xprt[id].smd_xprt_wq);
|
||||
return rc;
|
||||
}
|
||||
|
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/semaphore.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/wakelock.h>
|
||||
|
@ -44,7 +45,9 @@
|
|||
|
||||
|
||||
static int hcismd_set;
|
||||
static DEFINE_MUTEX(hci_smd_enable);
|
||||
static DEFINE_SEMAPHORE(hci_smd_enable);
|
||||
|
||||
static int restart_in_progress;
|
||||
|
||||
static int hcismd_set_enable(const char *val, struct kernel_param *kp);
|
||||
module_param_call(hcismd_set, hcismd_set_enable, NULL, &hcismd_set, 0644);
|
||||
|
@ -497,18 +500,24 @@ static void hci_smd_deregister_dev(struct hci_smd_data *hsmd)
|
|||
|
||||
static void hci_dev_restart(struct work_struct *worker)
|
||||
{
|
||||
mutex_lock(&hci_smd_enable);
|
||||
down(&hci_smd_enable);
|
||||
restart_in_progress = 1;
|
||||
hci_smd_deregister_dev(&hs);
|
||||
hci_smd_register_smd(&hs);
|
||||
mutex_unlock(&hci_smd_enable);
|
||||
up(&hci_smd_enable);
|
||||
kfree(worker);
|
||||
}
|
||||
|
||||
static void hci_dev_smd_open(struct work_struct *worker)
|
||||
{
|
||||
mutex_lock(&hci_smd_enable);
|
||||
down(&hci_smd_enable);
|
||||
if (restart_in_progress == 1) {
|
||||
/* Allow wcnss to initialize */
|
||||
restart_in_progress = 0;
|
||||
msleep(10000);
|
||||
}
|
||||
hci_smd_hci_register_dev(&hs);
|
||||
mutex_unlock(&hci_smd_enable);
|
||||
up(&hci_smd_enable);
|
||||
kfree(worker);
|
||||
}
|
||||
|
||||
|
@ -516,7 +525,9 @@ static int hcismd_set_enable(const char *val, struct kernel_param *kp)
|
|||
{
|
||||
int ret = 0;
|
||||
|
||||
mutex_lock(&hci_smd_enable);
|
||||
pr_err("hcismd_set_enable %d", hcismd_set);
|
||||
|
||||
down(&hci_smd_enable);
|
||||
|
||||
ret = param_set_int(val, kp);
|
||||
|
||||
|
@ -526,7 +537,8 @@ static int hcismd_set_enable(const char *val, struct kernel_param *kp)
|
|||
switch (hcismd_set) {
|
||||
|
||||
case 1:
|
||||
hci_smd_register_smd(&hs);
|
||||
if (hs.hdev == NULL)
|
||||
hci_smd_register_smd(&hs);
|
||||
break;
|
||||
case 0:
|
||||
hci_smd_deregister_dev(&hs);
|
||||
|
@ -536,7 +548,7 @@ static int hcismd_set_enable(const char *val, struct kernel_param *kp)
|
|||
}
|
||||
|
||||
done:
|
||||
mutex_unlock(&hci_smd_enable);
|
||||
up(&hci_smd_enable);
|
||||
return ret;
|
||||
}
|
||||
static int __init hci_smd_init(void)
|
||||
|
@ -545,6 +557,8 @@ static int __init hci_smd_init(void)
|
|||
"msm_smd_Rx");
|
||||
wake_lock_init(&hs.wake_lock_tx, WAKE_LOCK_SUSPEND,
|
||||
"msm_smd_Tx");
|
||||
restart_in_progress = 0;
|
||||
hs.hdev = NULL;
|
||||
return 0;
|
||||
}
|
||||
module_init(hci_smd_init);
|
||||
|
|
|
@ -352,7 +352,7 @@ static int qcedev_release(struct inode *inode, struct file *file)
|
|||
}
|
||||
kzfree(handle);
|
||||
file->private_data = NULL;
|
||||
if (podev->platform_support.bus_scale_table != NULL)
|
||||
if (podev != NULL && podev->platform_support.bus_scale_table != NULL)
|
||||
qcedev_ce_high_bw_req(podev, false);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -889,7 +889,7 @@ static void _qce_aead_complete(void *cookie, unsigned char *icv,
|
|||
ctx->authsize, 1);
|
||||
|
||||
} else {
|
||||
unsigned char tmp[SHA256_DIGESTSIZE];
|
||||
unsigned char tmp[SHA256_DIGESTSIZE] = {0};
|
||||
|
||||
/* compare icv from src */
|
||||
scatterwalk_map_and_copy(tmp,
|
||||
|
|
|
@ -69,7 +69,7 @@ struct device *msm_iommu_get_ctx(const char *ctx_name)
|
|||
r.name = ctx_name;
|
||||
found = device_for_each_child(&msm_iommu_root_dev->dev, &r, each_iommu);
|
||||
|
||||
if (!found || !dev_get_drvdata(r.dev)) {
|
||||
if (found <= 0 || !dev_get_drvdata(r.dev)) {
|
||||
pr_err("Could not find context <%s>\n", ctx_name);
|
||||
goto fail;
|
||||
}
|
||||
|
|
|
@ -138,6 +138,9 @@ struct dmx_ts_feed {
|
|||
int (*stop_filtering) (struct dmx_ts_feed* feed);
|
||||
int (*set_indexing_params) (struct dmx_ts_feed *feed,
|
||||
struct dmx_indexing_video_params *params);
|
||||
int (*get_decoder_buff_status)(
|
||||
struct dmx_ts_feed *feed,
|
||||
struct dmx_buffer_status *dmx_buffer_status);
|
||||
};
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
|
|
@ -849,6 +849,42 @@ static int dvb_dmxdev_get_buffer_status(
|
|||
|
||||
spin_lock_irq(&dmxdevfilter->dev->lock);
|
||||
|
||||
if ((dmxdevfilter->type == DMXDEV_TYPE_PES) &&
|
||||
(dmxdevfilter->params.pes.output == DMX_OUT_DECODER)) {
|
||||
struct dmxdev_feed *feed;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* Ask for status of decoder's buffer from underlying HW.
|
||||
* In case of PCR/STC extraction, the filter's ring-buffer
|
||||
* is used to gather the PCR/STC data and not using
|
||||
* an internal decoder buffer.
|
||||
*/
|
||||
if (!(dmxdevfilter->dev->capabilities &
|
||||
DMXDEV_CAP_PCR_EXTRACTION) ||
|
||||
((dmxdevfilter->params.pes.pes_type != DMX_PES_PCR0) &&
|
||||
(dmxdevfilter->params.pes.pes_type != DMX_PES_PCR1) &&
|
||||
(dmxdevfilter->params.pes.pes_type != DMX_PES_PCR2) &&
|
||||
(dmxdevfilter->params.pes.pes_type != DMX_PES_PCR3))) {
|
||||
list_for_each_entry(feed, &dmxdevfilter->feed.ts,
|
||||
next) {
|
||||
if (feed->ts->get_decoder_buff_status)
|
||||
ret = feed->ts->get_decoder_buff_status(
|
||||
feed->ts,
|
||||
dmx_buffer_status);
|
||||
else
|
||||
ret = -ENODEV;
|
||||
|
||||
/*
|
||||
* There should not be more than one ts feed
|
||||
* in the list as this is DECODER feed.
|
||||
*/
|
||||
spin_unlock_irq(&dmxdevfilter->dev->lock);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
dmx_buffer_status->error = buf->error;
|
||||
if (buf->error)
|
||||
dvb_ringbuffer_flush(buf);
|
||||
|
|
|
@ -1027,6 +1027,32 @@ static int dmx_ts_feed_stop_filtering(struct dmx_ts_feed *ts_feed)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int dmx_ts_feed_decoder_buff_status(struct dmx_ts_feed *ts_feed,
|
||||
struct dmx_buffer_status *dmx_buffer_status)
|
||||
{
|
||||
struct dvb_demux_feed *feed = (struct dvb_demux_feed *)ts_feed;
|
||||
struct dvb_demux *demux = feed->demux;
|
||||
int ret;
|
||||
|
||||
spin_lock_irq(&demux->lock);
|
||||
|
||||
if (feed->state < DMX_STATE_GO) {
|
||||
spin_unlock_irq(&demux->lock);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!demux->decoder_buffer_status) {
|
||||
spin_unlock_irq(&demux->lock);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = demux->decoder_buffer_status(feed, dmx_buffer_status);
|
||||
|
||||
spin_unlock_irq(&demux->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int dmx_ts_set_indexing_params(
|
||||
struct dmx_ts_feed *ts_feed,
|
||||
struct dmx_indexing_video_params *params)
|
||||
|
@ -1078,6 +1104,7 @@ static int dvbdmx_allocate_ts_feed(struct dmx_demux *dmx,
|
|||
(*ts_feed)->stop_filtering = dmx_ts_feed_stop_filtering;
|
||||
(*ts_feed)->set = dmx_ts_feed_set;
|
||||
(*ts_feed)->set_indexing_params = dmx_ts_set_indexing_params;
|
||||
(*ts_feed)->get_decoder_buff_status = dmx_ts_feed_decoder_buff_status;
|
||||
|
||||
if (!(feed->filter = dvb_dmx_filter_alloc(demux))) {
|
||||
feed->state = DMX_STATE_FREE;
|
||||
|
|
|
@ -116,6 +116,8 @@ struct dvb_demux {
|
|||
int (*decoder_fullness_wait)(struct dvb_demux_feed *feed,
|
||||
size_t required_space);
|
||||
int (*decoder_fullness_abort)(struct dvb_demux_feed *feed);
|
||||
int (*decoder_buffer_status)(struct dvb_demux_feed *feed,
|
||||
struct dmx_buffer_status *dmx_buffer_status);
|
||||
u32 (*check_crc32)(struct dvb_demux_feed *feed,
|
||||
const u8 *buf, size_t len);
|
||||
void (*memcopy)(struct dvb_demux_feed *feed, u8 *dst,
|
||||
|
|
|
@ -719,7 +719,7 @@ int mpq_dmx_set_source(
|
|||
int i;
|
||||
int dvr_index;
|
||||
int dmx_index;
|
||||
struct dvb_demux *dvb_demux = (struct dvb_demux *)demux->priv;
|
||||
struct dvb_demux *dvb_demux = demux->priv;
|
||||
struct mpq_demux *mpq_demux;
|
||||
|
||||
if ((mpq_dmx_info.devices == NULL) || (dvb_demux == NULL)) {
|
||||
|
@ -727,7 +727,7 @@ int mpq_dmx_set_source(
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
mpq_demux = (struct mpq_demux *)dvb_demux->priv;
|
||||
mpq_demux = dvb_demux->priv;
|
||||
if (mpq_demux == NULL) {
|
||||
MPQ_DVB_ERR_PRINT("%s: invalid parameters\n", __func__);
|
||||
return -EINVAL;
|
||||
|
@ -781,8 +781,7 @@ int mpq_dmx_init_video_feed(struct dvb_demux_feed *feed)
|
|||
void *packet_buffer;
|
||||
void *payload_buffer;
|
||||
struct mpq_video_feed_info *feed_data;
|
||||
struct mpq_demux *mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
struct mpq_streambuffer *stream_buffer;
|
||||
int actual_buffer_size;
|
||||
|
||||
|
@ -993,11 +992,8 @@ int mpq_dmx_terminate_video_feed(struct dvb_demux_feed *feed)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
|
||||
feed_data =
|
||||
(struct mpq_video_feed_info *)feed->priv;
|
||||
mpq_demux = feed->demux->priv;
|
||||
feed_data = feed->priv;
|
||||
|
||||
spin_lock(&mpq_demux->feed_lock);
|
||||
feed->priv = NULL;
|
||||
|
@ -1024,10 +1020,7 @@ EXPORT_SYMBOL(mpq_dmx_terminate_video_feed);
|
|||
|
||||
int mpq_dmx_decoder_fullness_init(struct dvb_demux_feed *feed)
|
||||
{
|
||||
struct mpq_demux *mpq_demux;
|
||||
|
||||
mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
if (mpq_dmx_is_video_feed(feed)) {
|
||||
struct mpq_video_feed_info *feed_data;
|
||||
|
@ -1042,9 +1035,7 @@ int mpq_dmx_decoder_fullness_init(struct dvb_demux_feed *feed)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
feed_data =
|
||||
(struct mpq_video_feed_info *)feed->priv;
|
||||
|
||||
feed_data = feed->priv;
|
||||
feed_data->fullness_wait_cancel = 0;
|
||||
|
||||
spin_unlock(&mpq_demux->feed_lock);
|
||||
|
@ -1066,10 +1057,7 @@ int mpq_dmx_decoder_fullness_wait(
|
|||
struct dvb_demux_feed *feed,
|
||||
size_t required_space)
|
||||
{
|
||||
struct mpq_demux *mpq_demux;
|
||||
|
||||
mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
if (mpq_dmx_is_video_feed(feed)) {
|
||||
int ret;
|
||||
|
@ -1083,11 +1071,8 @@ int mpq_dmx_decoder_fullness_wait(
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
feed_data =
|
||||
(struct mpq_video_feed_info *)feed->priv;
|
||||
|
||||
video_buff =
|
||||
&feed_data->video_buffer->raw_data;
|
||||
feed_data = feed->priv;
|
||||
video_buff = &feed_data->video_buffer->raw_data;
|
||||
|
||||
ret = 0;
|
||||
if ((feed_data != NULL) &&
|
||||
|
@ -1145,10 +1130,7 @@ EXPORT_SYMBOL(mpq_dmx_decoder_fullness_wait);
|
|||
|
||||
int mpq_dmx_decoder_fullness_abort(struct dvb_demux_feed *feed)
|
||||
{
|
||||
struct mpq_demux *mpq_demux;
|
||||
|
||||
mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
if (mpq_dmx_is_video_feed(feed)) {
|
||||
struct mpq_video_feed_info *feed_data;
|
||||
|
@ -1164,11 +1146,9 @@ int mpq_dmx_decoder_fullness_abort(struct dvb_demux_feed *feed)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
feed_data =
|
||||
(struct mpq_video_feed_info *)feed->priv;
|
||||
feed_data = feed->priv;
|
||||
|
||||
video_buff =
|
||||
&feed_data->video_buffer->raw_data;
|
||||
video_buff = &feed_data->video_buffer->raw_data;
|
||||
|
||||
feed_data->fullness_wait_cancel = 1;
|
||||
spin_unlock(&mpq_demux->feed_lock);
|
||||
|
@ -1402,12 +1382,11 @@ static int mpq_dmx_process_video_packet_framing(
|
|||
u32 pattern_addr = 0;
|
||||
int is_video_frame = 0;
|
||||
|
||||
mpq_demux = (struct mpq_demux *)feed->demux->priv;
|
||||
mpq_demux = feed->demux->priv;
|
||||
|
||||
spin_lock(&mpq_demux->feed_lock);
|
||||
|
||||
feed_data = (struct mpq_video_feed_info *)feed->priv;
|
||||
|
||||
feed_data = feed->priv;
|
||||
if (unlikely(feed_data == NULL)) {
|
||||
spin_unlock(&mpq_demux->feed_lock);
|
||||
return 0;
|
||||
|
@ -1713,12 +1692,11 @@ static int mpq_dmx_process_video_packet_no_framing(
|
|||
struct pes_packet_header *pes_header;
|
||||
struct mpq_demux *mpq_demux;
|
||||
|
||||
mpq_demux = (struct mpq_demux *)feed->demux->priv;
|
||||
mpq_demux = feed->demux->priv;
|
||||
|
||||
spin_lock(&mpq_demux->feed_lock);
|
||||
|
||||
feed_data = (struct mpq_video_feed_info *)feed->priv;
|
||||
|
||||
feed_data = feed->priv;
|
||||
if (unlikely(feed_data == NULL)) {
|
||||
spin_unlock(&mpq_demux->feed_lock);
|
||||
return 0;
|
||||
|
@ -1869,6 +1847,50 @@ static int mpq_dmx_process_video_packet_no_framing(
|
|||
return 0;
|
||||
}
|
||||
|
||||
int mpq_dmx_decoder_buffer_status(struct dvb_demux_feed *feed,
|
||||
struct dmx_buffer_status *dmx_buffer_status)
|
||||
{
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
if (mpq_dmx_is_video_feed(feed)) {
|
||||
struct mpq_video_feed_info *feed_data;
|
||||
struct dvb_ringbuffer *video_buff;
|
||||
|
||||
spin_lock(&mpq_demux->feed_lock);
|
||||
|
||||
if (feed->priv == NULL) {
|
||||
MPQ_DVB_ERR_PRINT(
|
||||
"%s: invalid feed, feed->priv is NULL\n",
|
||||
__func__);
|
||||
spin_unlock(&mpq_demux->feed_lock);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
feed_data = feed->priv;
|
||||
video_buff = &feed_data->video_buffer->raw_data;
|
||||
|
||||
dmx_buffer_status->error = video_buff->error;
|
||||
dmx_buffer_status->fullness = dvb_ringbuffer_avail(video_buff);
|
||||
dmx_buffer_status->free_bytes = dvb_ringbuffer_free(video_buff);
|
||||
dmx_buffer_status->read_offset = video_buff->pread;
|
||||
dmx_buffer_status->write_offset = video_buff->pwrite;
|
||||
dmx_buffer_status->size = video_buff->size;
|
||||
|
||||
spin_unlock(&mpq_demux->feed_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* else */
|
||||
MPQ_DVB_ERR_PRINT(
|
||||
"%s: Invalid feed type %d\n",
|
||||
__func__,
|
||||
feed->pes_type);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
EXPORT_SYMBOL(mpq_dmx_decoder_buffer_status);
|
||||
|
||||
int mpq_dmx_process_video_packet(
|
||||
struct dvb_demux_feed *feed,
|
||||
const u8 *buf)
|
||||
|
@ -1888,8 +1910,7 @@ int mpq_dmx_process_pcr_packet(
|
|||
u64 pcr;
|
||||
u64 stc;
|
||||
u8 output[PCR_STC_LEN];
|
||||
struct mpq_demux *mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
const struct ts_packet_header *ts_header;
|
||||
const struct ts_adaptation_field *adaptation_field;
|
||||
|
||||
|
|
|
@ -425,6 +425,18 @@ int mpq_dmx_decoder_fullness_wait(
|
|||
int mpq_dmx_decoder_fullness_abort(
|
||||
struct dvb_demux_feed *feed);
|
||||
|
||||
/**
|
||||
* mpq_dmx_decoder_buffer_status - Returns the
|
||||
* status of the decoder's buffer.
|
||||
*
|
||||
* @feed: The decoder's feed
|
||||
* @dmx_buffer_status: Status of decoder's buffer
|
||||
*
|
||||
* Return error code.
|
||||
*/
|
||||
int mpq_dmx_decoder_buffer_status(struct dvb_demux_feed *feed,
|
||||
struct dmx_buffer_status *dmx_buffer_status);
|
||||
|
||||
/**
|
||||
* mpq_dmx_process_video_packet - Assemble PES data and output it
|
||||
* to the stream-buffer connected to the decoder.
|
||||
|
|
|
@ -414,8 +414,7 @@ static int mpq_tsif_dmx_stop(struct mpq_demux *mpq_demux)
|
|||
static int mpq_tsif_dmx_start_filtering(struct dvb_demux_feed *feed)
|
||||
{
|
||||
int ret = 0;
|
||||
struct mpq_demux *mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
MPQ_DVB_DBG_PRINT(
|
||||
"%s(%d) executed\n",
|
||||
|
@ -482,8 +481,7 @@ static int mpq_tsif_dmx_start_filtering(struct dvb_demux_feed *feed)
|
|||
static int mpq_tsif_dmx_stop_filtering(struct dvb_demux_feed *feed)
|
||||
{
|
||||
int ret = 0;
|
||||
struct mpq_demux *mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
MPQ_DVB_DBG_PRINT(
|
||||
"%s(%d) executed\n",
|
||||
|
@ -559,7 +557,7 @@ static int mpq_tsif_dmx_write_to_decoder(
|
|||
static int mpq_tsif_dmx_get_caps(struct dmx_demux *demux,
|
||||
struct dmx_caps *caps)
|
||||
{
|
||||
struct dvb_demux *dvb_demux = (struct dvb_demux *)demux->priv;
|
||||
struct dvb_demux *dvb_demux = demux->priv;
|
||||
|
||||
if ((dvb_demux == NULL) || (caps == NULL)) {
|
||||
MPQ_DVB_ERR_PRINT(
|
||||
|
@ -627,6 +625,9 @@ static int mpq_tsif_dmx_init(
|
|||
mpq_demux->demux.decoder_fullness_abort =
|
||||
mpq_dmx_decoder_fullness_abort;
|
||||
|
||||
mpq_demux->demux.decoder_buffer_status =
|
||||
mpq_dmx_decoder_buffer_status;
|
||||
|
||||
/* Initialize dvb_demux object */
|
||||
result = dvb_dmx_init(&mpq_demux->demux);
|
||||
if (result < 0) {
|
||||
|
|
|
@ -264,7 +264,7 @@ static void mpq_tspp_callback(u32 channel_id, void *user)
|
|||
*/
|
||||
static int mpq_tspp_dmx_add_channel(struct dvb_demux_feed *feed)
|
||||
{
|
||||
struct mpq_demux *mpq_demux = (struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
enum tspp_source tspp_source;
|
||||
struct tspp_filter tspp_filter;
|
||||
int tsif;
|
||||
|
@ -455,7 +455,7 @@ static int mpq_tspp_dmx_remove_channel(struct dvb_demux_feed *feed)
|
|||
int channel_id;
|
||||
int *channel_ref_count;
|
||||
struct tspp_filter tspp_filter;
|
||||
struct mpq_demux *mpq_demux = (struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
/* determine the TSIF we are reading from */
|
||||
if (mpq_demux->source == DMX_SOURCE_FRONT0) {
|
||||
|
@ -559,8 +559,7 @@ remove_channel_failed:
|
|||
static int mpq_tspp_dmx_start_filtering(struct dvb_demux_feed *feed)
|
||||
{
|
||||
int ret;
|
||||
struct mpq_demux *mpq_demux =
|
||||
(struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
MPQ_DVB_DBG_PRINT(
|
||||
"%s(%d) executed\n",
|
||||
|
@ -620,7 +619,7 @@ static int mpq_tspp_dmx_start_filtering(struct dvb_demux_feed *feed)
|
|||
static int mpq_tspp_dmx_stop_filtering(struct dvb_demux_feed *feed)
|
||||
{
|
||||
int ret = 0;
|
||||
struct mpq_demux *mpq_demux = (struct mpq_demux *)feed->demux->priv;
|
||||
struct mpq_demux *mpq_demux = feed->demux->priv;
|
||||
|
||||
MPQ_DVB_DBG_PRINT(
|
||||
"%s(%d) executed\n",
|
||||
|
@ -677,7 +676,7 @@ static int mpq_tspp_dmx_write_to_decoder(
|
|||
static int mpq_tspp_dmx_get_caps(struct dmx_demux *demux,
|
||||
struct dmx_caps *caps)
|
||||
{
|
||||
struct dvb_demux *dvb_demux = (struct dvb_demux *)demux->priv;
|
||||
struct dvb_demux *dvb_demux = demux->priv;
|
||||
|
||||
if ((dvb_demux == NULL) || (caps == NULL)) {
|
||||
MPQ_DVB_ERR_PRINT(
|
||||
|
@ -737,6 +736,9 @@ static int mpq_tspp_dmx_init(
|
|||
mpq_demux->demux.decoder_fullness_abort =
|
||||
mpq_dmx_decoder_fullness_abort;
|
||||
|
||||
mpq_demux->demux.decoder_buffer_status =
|
||||
mpq_dmx_decoder_buffer_status;
|
||||
|
||||
/* Initialize dvb_demux object */
|
||||
result = dvb_dmx_init(&mpq_demux->demux);
|
||||
if (result < 0) {
|
||||
|
|
|
@ -62,7 +62,7 @@ static int mpq_tspp_dmx_stop_filtering(struct dvb_demux_feed *feed)
|
|||
static int mpq_tspp_dmx_get_caps(struct dmx_demux *demux,
|
||||
struct dmx_caps *caps)
|
||||
{
|
||||
struct dvb_demux *dvb_demux = (struct dvb_demux *)demux->priv;
|
||||
struct dvb_demux *dvb_demux = demux->priv;
|
||||
|
||||
if ((dvb_demux == NULL) || (caps == NULL)) {
|
||||
MPQ_DVB_ERR_PRINT(
|
||||
|
@ -124,6 +124,7 @@ static int mpq_tspp_dmx_init(
|
|||
mpq_demux->demux.decoder_fullness_init = NULL;
|
||||
mpq_demux->demux.decoder_fullness_wait = NULL;
|
||||
mpq_demux->demux.decoder_fullness_abort = NULL;
|
||||
mpq_demux->demux.decoder_buffer_status = NULL;
|
||||
|
||||
/* Initialize dvb_demux object */
|
||||
result = dvb_dmx_init(&mpq_demux->demux);
|
||||
|
|
|
@ -11,8 +11,9 @@ ifeq ($(CONFIG_MSM_CAMERA_V4L2),y)
|
|||
EXTRA_CFLAGS += -Idrivers/media/video/msm/eeprom
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm/sensors
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm/actuators
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm/server
|
||||
obj-$(CONFIG_MSM_CAMERA) += msm_isp.o msm.o msm_mem.o msm_mctl.o msm_mctl_buf.o msm_mctl_pp.o
|
||||
obj-$(CONFIG_MSM_CAMERA) += io/ eeprom/ sensors/ actuators/ csi/
|
||||
obj-$(CONFIG_MSM_CAMERA) += server/ eeprom/ sensors/ actuators/ csi/
|
||||
obj-$(CONFIG_MSM_CAMERA) += msm_gesture.o
|
||||
else
|
||||
obj-$(CONFIG_MSM_CAMERA) += msm_camera.o
|
||||
|
|
|
@ -108,6 +108,8 @@ static int msm_csid_config(struct csid_cfg_params *cfg_params)
|
|||
void __iomem *csidbase;
|
||||
csid_dev = v4l2_get_subdevdata(cfg_params->subdev);
|
||||
csidbase = csid_dev->base;
|
||||
if (csidbase == NULL)
|
||||
return -ENOMEM;
|
||||
csid_params = cfg_params->parms;
|
||||
|
||||
val = csid_params->lane_cnt - 1;
|
||||
|
|
|
@ -69,6 +69,9 @@ int msm_csiphy_config(struct csiphy_cfg_params *cfg_params)
|
|||
void __iomem *csiphybase;
|
||||
csiphy_dev = v4l2_get_subdevdata(cfg_params->subdev);
|
||||
csiphybase = csiphy_dev->base;
|
||||
if (csiphybase == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
csiphy_params = cfg_params->parms;
|
||||
lane_mask = csiphy_params->lane_mask;
|
||||
lane_cnt = csiphy_params->lane_cnt;
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -397,7 +397,6 @@ struct msm_cam_server_queue {
|
|||
uint32_t queue_active;
|
||||
struct msm_device_queue ctrl_q;
|
||||
struct msm_device_queue eventData_q;
|
||||
struct msm_ctrl_cmd *ctrl;
|
||||
uint8_t *ctrl_data;
|
||||
uint32_t evt_id;
|
||||
};
|
||||
|
@ -456,7 +455,6 @@ struct msm_cam_server_dev {
|
|||
|
||||
/* camera server related functions */
|
||||
|
||||
|
||||
/* ISP related functions */
|
||||
void msm_isp_vfe_dev_init(struct v4l2_subdev *vd);
|
||||
/*
|
||||
|
@ -571,15 +569,14 @@ int msm_mctl_pp_mctl_divert_done(struct msm_cam_media_controller *p_mctl,
|
|||
void msm_release_ion_client(struct kref *ref);
|
||||
int msm_cam_register_subdev_node(struct v4l2_subdev *sd,
|
||||
enum msm_cam_subdev_type sdev_type, uint8_t index);
|
||||
uint32_t msm_camera_get_mctl_handle(void);
|
||||
struct msm_cam_media_controller *msm_camera_get_mctl(uint32_t handle);
|
||||
void msm_camera_free_mctl(uint32_t handle);
|
||||
int msm_server_open_client(int *p_qidx);
|
||||
int msm_server_send_ctrl(struct msm_ctrl_cmd *out, int ctrl_id);
|
||||
int msm_server_close_client(int idx);
|
||||
int msm_cam_server_open_mctl_session(struct msm_cam_v4l2_device *pcam,
|
||||
int *p_active);
|
||||
int msm_cam_server_close_mctl_session(struct msm_cam_v4l2_device *pcam);
|
||||
long msm_v4l2_evt_notify(struct msm_cam_media_controller *mctl,
|
||||
unsigned int cmd, unsigned long evt);
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _MSM_H */
|
||||
|
|
|
@ -200,32 +200,31 @@ static int msm_gesture_handle_event(struct v4l2_subdev *sd,
|
|||
D("%s: Received gesture evt 0x%x ", __func__, evt->type);
|
||||
p_gesture_ctrl->event.evt_len = 0;
|
||||
p_gesture_ctrl->event.evt_data = NULL;
|
||||
if (0 != evt->u.data[0]) {
|
||||
p_ges_evt = (struct msm_ges_evt *)evt->u.data;
|
||||
D("%s: event data %p len %d", __func__,
|
||||
p_ges_evt->evt_data,
|
||||
p_ges_evt->evt_len);
|
||||
|
||||
if (p_ges_evt->evt_len > 0) {
|
||||
p_gesture_ctrl->event.evt_data =
|
||||
kzalloc(p_ges_evt->evt_len, GFP_KERNEL);
|
||||
p_ges_evt = (struct msm_ges_evt *)evt->u.data;
|
||||
D("%s: event data %p len %d", __func__,
|
||||
p_ges_evt->evt_data,
|
||||
p_ges_evt->evt_len);
|
||||
|
||||
if (NULL == p_gesture_ctrl->event.evt_data) {
|
||||
pr_err("%s: cannot allocate event", __func__);
|
||||
rc = -ENOMEM;
|
||||
if (p_ges_evt->evt_len > 0) {
|
||||
p_gesture_ctrl->event.evt_data =
|
||||
kzalloc(p_ges_evt->evt_len, GFP_KERNEL);
|
||||
|
||||
if (NULL == p_gesture_ctrl->event.evt_data) {
|
||||
pr_err("%s: cannot allocate event", __func__);
|
||||
rc = -ENOMEM;
|
||||
} else {
|
||||
if (copy_from_user(
|
||||
(void *)p_gesture_ctrl->event.evt_data,
|
||||
(void __user *)p_ges_evt->evt_data,
|
||||
p_ges_evt->evt_len)) {
|
||||
pr_err("%s: copy_from_user failed",
|
||||
__func__);
|
||||
rc = -EFAULT;
|
||||
} else {
|
||||
if (copy_from_user(
|
||||
(void *)p_gesture_ctrl->event.evt_data,
|
||||
(void __user *)p_ges_evt->evt_data,
|
||||
p_ges_evt->evt_len)) {
|
||||
pr_err("%s: copy_from_user failed",
|
||||
__func__);
|
||||
rc = -EFAULT;
|
||||
} else {
|
||||
D("%s: copied the event", __func__);
|
||||
p_gesture_ctrl->event.evt_len =
|
||||
p_ges_evt->evt_len;
|
||||
}
|
||||
D("%s: copied the event", __func__);
|
||||
p_gesture_ctrl->event.evt_len =
|
||||
p_ges_evt->evt_len;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
#include <mach/cpuidle.h>
|
||||
|
||||
#include "msm.h"
|
||||
#include "msm_cam_server.h"
|
||||
#include "msm_csid.h"
|
||||
#include "msm_csic.h"
|
||||
#include "msm_csiphy.h"
|
||||
|
@ -852,13 +853,13 @@ int msm_mctl_init(struct msm_cam_v4l2_device *pcam)
|
|||
pr_err("%s: param is NULL", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
pcam->mctl_handle = msm_camera_get_mctl_handle();
|
||||
pcam->mctl_handle = msm_cam_server_get_mctl_handle();
|
||||
if (pcam->mctl_handle == 0) {
|
||||
pr_err("%s: cannot get mctl handle", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
if (!pmctl) {
|
||||
pr_err("%s: invalid mctl controller", __func__);
|
||||
return -EINVAL;
|
||||
|
@ -898,7 +899,7 @@ int msm_mctl_free(struct msm_cam_v4l2_device *pcam)
|
|||
struct msm_cam_media_controller *pmctl = NULL;
|
||||
D("%s\n", __func__);
|
||||
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
if (!pmctl) {
|
||||
pr_err("%s: invalid mctl controller", __func__);
|
||||
return -EINVAL;
|
||||
|
@ -906,7 +907,7 @@ int msm_mctl_free(struct msm_cam_v4l2_device *pcam)
|
|||
|
||||
mutex_destroy(&pmctl->lock);
|
||||
pm_qos_remove_request(&pmctl->idle_pm_qos);
|
||||
msm_camera_free_mctl(pcam->mctl_handle);
|
||||
msm_cam_server_free_mctl(pcam->mctl_handle);
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
@ -962,7 +963,7 @@ static int msm_mctl_dev_open(struct file *f)
|
|||
return rc;
|
||||
}
|
||||
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
if (!pmctl) {
|
||||
pr_err("%s mctl NULL!\n", __func__);
|
||||
return rc;
|
||||
|
@ -1038,7 +1039,7 @@ static int msm_mctl_dev_close(struct file *f)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
mutex_lock(&pcam->mctl_node.dev_lock);
|
||||
D("%s : active %d ", __func__, pcam->mctl_node.active);
|
||||
if (pcam->mctl_node.active == 1) {
|
||||
|
@ -1473,7 +1474,7 @@ static int msm_mctl_v4l2_s_fmt_cap(struct file *f, void *pctx,
|
|||
(void *)pfmt->fmt.pix.priv);
|
||||
WARN_ON(pctx != f->private_data);
|
||||
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
if (!pcam_inst->vbqueue_initialized) {
|
||||
pmctl->mctl_vbqueue_init(pcam_inst, &pcam_inst->vid_bufq,
|
||||
V4L2_BUF_TYPE_VIDEO_CAPTURE);
|
||||
|
@ -1497,7 +1498,7 @@ static int msm_mctl_v4l2_s_fmt_cap_mplane(struct file *f, void *pctx,
|
|||
pcam_inst, pcam_inst->vbqueue_initialized);
|
||||
WARN_ON(pctx != f->private_data);
|
||||
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
if (!pcam_inst->vbqueue_initialized) {
|
||||
pmctl->mctl_vbqueue_init(pcam_inst, &pcam_inst->vid_bufq,
|
||||
V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE);
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <linux/android_pmem.h>
|
||||
|
||||
#include "msm.h"
|
||||
#include "msm_cam_server.h"
|
||||
#include "msm_ispif.h"
|
||||
|
||||
#ifdef CONFIG_MSM_CAMERA_DEBUG
|
||||
|
@ -55,8 +56,8 @@ static int msm_vb2_ops_queue_setup(struct vb2_queue *vq,
|
|||
*num_planes = pcam_inst->plane_info.num_planes;
|
||||
for (i = 0; i < pcam_inst->vid_fmt.fmt.pix_mp.num_planes; i++) {
|
||||
sizes[i] = pcam_inst->plane_info.plane[i].size;
|
||||
D("%s Inst %p : Plane %d Offset = %d Size = %ld "
|
||||
"Aligned Size = %d\n", __func__, pcam_inst, i,
|
||||
D("%s Inst %p : Plane %d Offset = %d Size = %ld"
|
||||
"Aligned Size = %d", __func__, pcam_inst, i,
|
||||
pcam_inst->plane_info.plane[i].offset,
|
||||
pcam_inst->plane_info.plane[i].size, sizes[i]);
|
||||
}
|
||||
|
@ -114,7 +115,7 @@ static int msm_vb2_ops_buf_init(struct vb2_buffer *vb)
|
|||
pcam_inst->plane_info.plane[0].offset;
|
||||
}
|
||||
buf_idx = vb->v4l2_buf.index;
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
for (i = 0; i < vb->num_planes; i++) {
|
||||
mem = vb2_plane_cookie(vb, i);
|
||||
if (buf_type == VIDEOBUF2_MULTIPLE_PLANES)
|
||||
|
@ -250,7 +251,7 @@ static void msm_vb2_ops_buf_cleanup(struct vb2_buffer *vb)
|
|||
}
|
||||
spin_unlock_irqrestore(&pcam_inst->vq_irqlock, flags);
|
||||
}
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
for (i = 0; i < vb->num_planes; i++) {
|
||||
mem = vb2_plane_cookie(vb, i);
|
||||
videobuf2_pmem_contig_user_put(mem, pmctl->client);
|
||||
|
@ -471,7 +472,7 @@ int msm_mctl_buf_done(struct msm_cam_media_controller *p_mctl,
|
|||
int msm_mctl_buf_init(struct msm_cam_v4l2_device *pcam)
|
||||
{
|
||||
struct msm_cam_media_controller *pmctl;
|
||||
pmctl = msm_camera_get_mctl(pcam->mctl_handle);
|
||||
pmctl = msm_cam_server_get_mctl(pcam->mctl_handle);
|
||||
pmctl->mctl_vbqueue_init = msm_vbqueue_init;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -368,7 +368,6 @@ static const char * const vfe31_general_cmd[] = {
|
|||
static void vfe31_stop(void)
|
||||
{
|
||||
|
||||
uint8_t axiBusyFlag = true;
|
||||
unsigned long flags;
|
||||
|
||||
atomic_set(&vfe31_ctrl->vstate, 0);
|
||||
|
@ -398,7 +397,52 @@ static void vfe31_stop(void)
|
|||
* at any time. stop camif immediately. */
|
||||
msm_camera_io_w_mb(CAMIF_COMMAND_STOP_IMMEDIATELY,
|
||||
vfe31_ctrl->vfebase + VFE_CAMIF_COMMAND);
|
||||
}
|
||||
|
||||
void axi_start(void)
|
||||
{
|
||||
switch (vfe31_ctrl->operation_mode) {
|
||||
case VFE_OUTPUTS_PREVIEW:
|
||||
case VFE_OUTPUTS_PREVIEW_AND_VIDEO:
|
||||
if (vfe31_ctrl->outpath.output_mode &
|
||||
VFE31_OUTPUT_MODE_PRIMARY) {
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch0]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch1]);
|
||||
} else if (vfe31_ctrl->outpath.output_mode &
|
||||
VFE31_OUTPUT_MODE_PRIMARY_ALL_CHNLS) {
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch0]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch1]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch2]);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
if (vfe31_ctrl->outpath.output_mode &
|
||||
VFE31_OUTPUT_MODE_SECONDARY) {
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch0]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch1]);
|
||||
} else if (vfe31_ctrl->outpath.output_mode &
|
||||
VFE31_OUTPUT_MODE_SECONDARY_ALL_CHNLS) {
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch0]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch1]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch2]);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void axi_stop(void)
|
||||
{
|
||||
uint8_t axiBusyFlag = true;
|
||||
/* axi halt command. */
|
||||
msm_camera_io_w(AXI_HALT,
|
||||
vfe31_ctrl->vfebase + VFE_AXI_CMD);
|
||||
|
@ -955,43 +999,6 @@ static int vfe31_start(struct msm_cam_media_controller *pmctl)
|
|||
}
|
||||
msm_camera_io_w(irq_comp_mask, vfe31_ctrl->vfebase + VFE_IRQ_COMP_MASK);
|
||||
|
||||
switch (vfe31_ctrl->operation_mode) {
|
||||
case VFE_OUTPUTS_PREVIEW:
|
||||
case VFE_OUTPUTS_PREVIEW_AND_VIDEO:
|
||||
if (vfe31_ctrl->outpath.output_mode &
|
||||
VFE31_OUTPUT_MODE_PRIMARY) {
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch0]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch1]);
|
||||
} else if (vfe31_ctrl->outpath.output_mode &
|
||||
VFE31_OUTPUT_MODE_PRIMARY_ALL_CHNLS) {
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch0]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch1]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch2]);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
if (vfe31_ctrl->outpath.output_mode &
|
||||
VFE31_OUTPUT_MODE_SECONDARY) {
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch0]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch1]);
|
||||
} else if (vfe31_ctrl->outpath.output_mode &
|
||||
VFE31_OUTPUT_MODE_SECONDARY_ALL_CHNLS) {
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch0]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch1]);
|
||||
msm_camera_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out1.ch2]);
|
||||
}
|
||||
break;
|
||||
}
|
||||
msm_camio_bus_scale_cfg(
|
||||
pmctl->sdata->pdata->cam_bus_scale_table, S_PREVIEW);
|
||||
vfe31_start_common();
|
||||
|
@ -3326,12 +3333,14 @@ static long msm_vfe_subdev_ioctl(struct v4l2_subdev *sd,
|
|||
cmd->cmd_type != CMD_STATS_RS_BUF_RELEASE &&
|
||||
cmd->cmd_type != CMD_STATS_CS_BUF_RELEASE &&
|
||||
cmd->cmd_type != CMD_STATS_AF_BUF_RELEASE) {
|
||||
if (copy_from_user(&vfecmd,
|
||||
(void __user *)(cmd->value),
|
||||
sizeof(vfecmd))) {
|
||||
pr_err("%s %d: copy_from_user failed\n", __func__,
|
||||
__LINE__);
|
||||
return -EFAULT;
|
||||
if (NULL != cmd->value) {
|
||||
if (copy_from_user(&vfecmd,
|
||||
(void __user *)(cmd->value),
|
||||
sizeof(vfecmd))) {
|
||||
pr_err("%s %d: copy_from_user failed\n",
|
||||
__func__, __LINE__);
|
||||
return -EFAULT;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/* here eith stats release or frame release. */
|
||||
|
@ -3572,6 +3581,14 @@ static long msm_vfe_subdev_ioctl(struct v4l2_subdev *sd,
|
|||
}
|
||||
break;
|
||||
|
||||
case CMD_AXI_START:
|
||||
axi_start();
|
||||
break;
|
||||
|
||||
case CMD_AXI_STOP:
|
||||
axi_stop();
|
||||
break;
|
||||
|
||||
default:
|
||||
pr_err("%s Unsupported AXI configuration %x ", __func__,
|
||||
cmd->cmd_type);
|
||||
|
|
|
@ -359,7 +359,6 @@ static const char * const vfe32_general_cmd[] = {
|
|||
|
||||
static void vfe32_stop(void)
|
||||
{
|
||||
uint8_t axiBusyFlag = true;
|
||||
unsigned long flags;
|
||||
|
||||
atomic_set(&vfe32_ctrl->vstate, 0);
|
||||
|
@ -390,31 +389,6 @@ static void vfe32_stop(void)
|
|||
msm_camera_io_w(CAMIF_COMMAND_STOP_IMMEDIATELY,
|
||||
vfe32_ctrl->vfebase + VFE_CAMIF_COMMAND);
|
||||
|
||||
/* axi halt command. */
|
||||
msm_camera_io_w(AXI_HALT,
|
||||
vfe32_ctrl->vfebase + VFE_AXI_CMD);
|
||||
wmb();
|
||||
while (axiBusyFlag) {
|
||||
if (msm_camera_io_r(vfe32_ctrl->vfebase + VFE_AXI_STATUS) & 0x1)
|
||||
axiBusyFlag = false;
|
||||
}
|
||||
/* Ensure the write order while writing
|
||||
to the command register using the barrier */
|
||||
msm_camera_io_w_mb(AXI_HALT_CLEAR,
|
||||
vfe32_ctrl->vfebase + VFE_AXI_CMD);
|
||||
|
||||
/* after axi halt, then ok to apply global reset. */
|
||||
/* enable reset_ack and async timer interrupt only while
|
||||
stopping the pipeline.*/
|
||||
msm_camera_io_w(0xf0000000,
|
||||
vfe32_ctrl->vfebase + VFE_IRQ_MASK_0);
|
||||
msm_camera_io_w(VFE_IMASK_WHILE_STOPPING_1,
|
||||
vfe32_ctrl->vfebase + VFE_IRQ_MASK_1);
|
||||
|
||||
/* Ensure the write order while writing
|
||||
to the command register using the barrier */
|
||||
msm_camera_io_w_mb(VFE_RESET_UPON_STOP_CMD,
|
||||
vfe32_ctrl->vfebase + VFE_GLOBAL_RESET);
|
||||
}
|
||||
|
||||
static void vfe32_subdev_notify(int id, int path)
|
||||
|
@ -911,7 +885,6 @@ static int vfe32_capture(
|
|||
static int vfe32_start(struct msm_cam_media_controller *pmctl)
|
||||
{
|
||||
uint32_t irq_comp_mask = 0;
|
||||
|
||||
irq_comp_mask =
|
||||
msm_camera_io_r(vfe32_ctrl->vfebase + VFE_IRQ_COMP_MASK);
|
||||
|
||||
|
@ -935,44 +908,6 @@ static int vfe32_start(struct msm_cam_media_controller *pmctl)
|
|||
}
|
||||
msm_camera_io_w(irq_comp_mask, vfe32_ctrl->vfebase + VFE_IRQ_COMP_MASK);
|
||||
|
||||
switch (vfe32_ctrl->operation_mode) {
|
||||
case VFE_OUTPUTS_PREVIEW:
|
||||
case VFE_OUTPUTS_PREVIEW_AND_VIDEO:
|
||||
if (vfe32_ctrl->outpath.output_mode &
|
||||
VFE32_OUTPUT_MODE_PRIMARY) {
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
|
||||
} else if (vfe32_ctrl->outpath.output_mode &
|
||||
VFE32_OUTPUT_MODE_PRIMARY_ALL_CHNLS) {
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch2]);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
if (vfe32_ctrl->outpath.output_mode &
|
||||
VFE32_OUTPUT_MODE_SECONDARY) {
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch0]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch1]);
|
||||
} else if (vfe32_ctrl->outpath.output_mode &
|
||||
VFE32_OUTPUT_MODE_SECONDARY_ALL_CHNLS) {
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch0]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch1]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch2]);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
msm_camio_bus_scale_cfg(
|
||||
pmctl->sdata->pdata->cam_bus_scale_table, S_PREVIEW);
|
||||
vfe32_start_common();
|
||||
|
@ -3999,23 +3934,97 @@ void msm_vfe_subdev_release(struct v4l2_subdev *sd)
|
|||
vfe32_ctrl->vfebase = 0;
|
||||
}
|
||||
|
||||
void axi_start(void)
|
||||
{
|
||||
switch (vfe32_ctrl->operation_mode) {
|
||||
case VFE_OUTPUTS_PREVIEW:
|
||||
case VFE_OUTPUTS_PREVIEW_AND_VIDEO:
|
||||
if (vfe32_ctrl->outpath.output_mode &
|
||||
VFE32_OUTPUT_MODE_PRIMARY) {
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
|
||||
} else if (vfe32_ctrl->outpath.output_mode &
|
||||
VFE32_OUTPUT_MODE_PRIMARY_ALL_CHNLS) {
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch2]);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
if (vfe32_ctrl->outpath.output_mode &
|
||||
VFE32_OUTPUT_MODE_SECONDARY) {
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch0]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch1]);
|
||||
} else if (vfe32_ctrl->outpath.output_mode &
|
||||
VFE32_OUTPUT_MODE_SECONDARY_ALL_CHNLS) {
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch0]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch1]);
|
||||
msm_camera_io_w(1, vfe32_ctrl->vfebase +
|
||||
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out1.ch2]);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void axi_stop(void)
|
||||
{
|
||||
uint8_t axiBusyFlag = true;
|
||||
/* axi halt command. */
|
||||
msm_camera_io_w(AXI_HALT,
|
||||
vfe32_ctrl->vfebase + VFE_AXI_CMD);
|
||||
wmb();
|
||||
while (axiBusyFlag) {
|
||||
if (msm_camera_io_r(vfe32_ctrl->vfebase + VFE_AXI_STATUS) & 0x1)
|
||||
axiBusyFlag = false;
|
||||
}
|
||||
/* Ensure the write order while writing
|
||||
to the command register using the barrier */
|
||||
msm_camera_io_w_mb(AXI_HALT_CLEAR,
|
||||
vfe32_ctrl->vfebase + VFE_AXI_CMD);
|
||||
|
||||
/* after axi halt, then ok to apply global reset. */
|
||||
/* enable reset_ack and async timer interrupt only while
|
||||
stopping the pipeline.*/
|
||||
msm_camera_io_w(0xf0000000,
|
||||
vfe32_ctrl->vfebase + VFE_IRQ_MASK_0);
|
||||
msm_camera_io_w(VFE_IMASK_WHILE_STOPPING_1,
|
||||
vfe32_ctrl->vfebase + VFE_IRQ_MASK_1);
|
||||
|
||||
/* Ensure the write order while writing
|
||||
to the command register using the barrier */
|
||||
msm_camera_io_w_mb(VFE_RESET_UPON_STOP_CMD,
|
||||
vfe32_ctrl->vfebase + VFE_GLOBAL_RESET);
|
||||
}
|
||||
|
||||
static int msm_axi_config(struct v4l2_subdev *sd, void __user *arg)
|
||||
{
|
||||
struct msm_vfe_cfg_cmd cfgcmd;
|
||||
struct msm_isp_cmd vfecmd;
|
||||
int rc = 0;
|
||||
|
||||
if (copy_from_user(&cfgcmd, arg, sizeof(cfgcmd))) {
|
||||
ERR_COPY_FROM_USER();
|
||||
return -EFAULT;
|
||||
if (NULL != arg) {
|
||||
if (copy_from_user(&cfgcmd, arg, sizeof(cfgcmd))) {
|
||||
ERR_COPY_FROM_USER();
|
||||
return -EFAULT;
|
||||
}
|
||||
}
|
||||
|
||||
if (copy_from_user(&vfecmd,
|
||||
(void __user *)(cfgcmd.value),
|
||||
sizeof(vfecmd))) {
|
||||
pr_err("%s %d: copy_from_user failed\n", __func__,
|
||||
__LINE__);
|
||||
return -EFAULT;
|
||||
if (NULL != cfgcmd.value) {
|
||||
if (copy_from_user(&vfecmd,
|
||||
(void __user *)(cfgcmd.value),
|
||||
sizeof(vfecmd))) {
|
||||
pr_err("%s %d: copy_from_user failed\n", __func__,
|
||||
__LINE__);
|
||||
return -EFAULT;
|
||||
}
|
||||
}
|
||||
|
||||
switch (cfgcmd.cmd_type) {
|
||||
|
@ -4118,6 +4127,12 @@ static int msm_axi_config(struct v4l2_subdev *sd, void __user *arg)
|
|||
pr_err("%s Invalid/Unsupported AXI configuration %x",
|
||||
__func__, cfgcmd.cmd_type);
|
||||
break;
|
||||
case CMD_AXI_START:
|
||||
axi_start();
|
||||
break;
|
||||
case CMD_AXI_STOP:
|
||||
axi_stop();
|
||||
break;
|
||||
default:
|
||||
pr_err("%s Unsupported AXI configuration %x ", __func__,
|
||||
cfgcmd.cmd_type);
|
||||
|
|
|
@ -0,0 +1,11 @@
|
|||
GCC_VERSION := $(shell $(CONFIG_SHELL) $(PWD)/scripts/gcc-version.sh $(CROSS_COMPILE)gcc)
|
||||
|
||||
ifeq ($(CONFIG_MSM_CAMERA_V4L2),y)
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm/io
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm/csi
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm/eeprom
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm/sensors
|
||||
EXTRA_CFLAGS += -Idrivers/media/video/msm/actuators
|
||||
obj-$(CONFIG_MSM_CAMERA) += msm_cam_server.o
|
||||
endif
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,65 @@
|
|||
/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _MSM_CAM_SERVER_H
|
||||
#define _MSM_CAM_SERVER_H
|
||||
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <mach/camera.h>
|
||||
#include "msm.h"
|
||||
|
||||
uint32_t msm_cam_server_get_mctl_handle(void);
|
||||
struct msm_cam_media_controller *msm_cam_server_get_mctl(uint32_t handle);
|
||||
void msm_cam_server_free_mctl(uint32_t handle);
|
||||
/* Server session control APIs */
|
||||
int msm_server_begin_session(struct msm_cam_v4l2_device *pcam,
|
||||
int server_q_idx);
|
||||
int msm_server_end_session(struct msm_cam_v4l2_device *pcam);
|
||||
int msm_send_open_server(struct msm_cam_v4l2_device *pcam);
|
||||
int msm_send_close_server(struct msm_cam_v4l2_device *pcam);
|
||||
int msm_server_update_sensor_info(struct msm_cam_v4l2_device *pcam,
|
||||
struct msm_camera_sensor_info *sdata);
|
||||
/* Server camera control APIs */
|
||||
int msm_server_streamon(struct msm_cam_v4l2_device *pcam, int idx);
|
||||
int msm_server_streamoff(struct msm_cam_v4l2_device *pcam, int idx);
|
||||
int msm_server_get_usecount(void);
|
||||
int32_t msm_find_free_queue(void);
|
||||
int msm_server_proc_ctrl_cmd(struct msm_cam_v4l2_device *pcam,
|
||||
struct v4l2_control *ctrl, int is_set_cmd);
|
||||
int msm_server_s_ctrl(struct msm_cam_v4l2_device *pcam,
|
||||
struct v4l2_control *ctrl);
|
||||
int msm_server_g_ctrl(struct msm_cam_v4l2_device *pcam,
|
||||
struct v4l2_control *ctrl);
|
||||
int msm_server_q_ctrl(struct msm_cam_v4l2_device *pcam,
|
||||
struct v4l2_queryctrl *queryctrl);
|
||||
int msm_server_set_fmt(struct msm_cam_v4l2_device *pcam, int idx,
|
||||
struct v4l2_format *pfmt);
|
||||
int msm_server_set_fmt_mplane(struct msm_cam_v4l2_device *pcam, int idx,
|
||||
struct v4l2_format *pfmt);
|
||||
int msm_server_get_fmt(struct msm_cam_v4l2_device *pcam,
|
||||
int idx, struct v4l2_format *pfmt);
|
||||
int msm_server_get_fmt_mplane(struct msm_cam_v4l2_device *pcam,
|
||||
int idx, struct v4l2_format *pfmt);
|
||||
int msm_server_try_fmt(struct msm_cam_v4l2_device *pcam,
|
||||
struct v4l2_format *pfmt);
|
||||
int msm_server_try_fmt_mplane(struct msm_cam_v4l2_device *pcam,
|
||||
struct v4l2_format *pfmt);
|
||||
int msm_server_v4l2_subscribe_event(struct v4l2_fh *fh,
|
||||
struct v4l2_event_subscription *sub);
|
||||
int msm_server_v4l2_unsubscribe_event(struct v4l2_fh *fh,
|
||||
struct v4l2_event_subscription *sub);
|
||||
int msm_server_get_crop(struct msm_cam_v4l2_device *pcam,
|
||||
int idx, struct v4l2_crop *crop);
|
||||
|
||||
#endif /* _MSM_CAM_SERVER_H */
|
|
@ -224,6 +224,14 @@ static const struct msm_vidc_format vdec_formats[] = {
|
|||
.num_planes = 1,
|
||||
.get_frame_size = get_frame_size_compressed,
|
||||
.type = OUTPUT_PORT,
|
||||
},
|
||||
{
|
||||
.name = "DIVX",
|
||||
.description = "DIVX 4/5/6 compressed format",
|
||||
.fourcc = V4L2_PIX_FMT_DIVX,
|
||||
.num_planes = 1,
|
||||
.get_frame_size = get_frame_size_compressed,
|
||||
.type = OUTPUT_PORT,
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
@ -629,8 +629,10 @@ static enum hal_video_codec get_hal_codec_type(int fourcc)
|
|||
case V4L2_PIX_FMT_DIVX_311:
|
||||
codec = HAL_VIDEO_CODEC_DIVX_311;
|
||||
break;
|
||||
case V4L2_PIX_FMT_DIVX:
|
||||
codec = HAL_VIDEO_CODEC_DIVX;
|
||||
break;
|
||||
/*HAL_VIDEO_CODEC_MVC
|
||||
HAL_VIDEO_CODEC_DIVX
|
||||
HAL_VIDEO_CODEC_SPARK
|
||||
HAL_VIDEO_CODEC_VP6
|
||||
HAL_VIDEO_CODEC_VP7
|
||||
|
|
|
@ -510,9 +510,12 @@ static void hal_process_session_ftb_done(struct hal_device *device,
|
|||
if (sizeof(struct
|
||||
hfi_msg_session_fill_buffer_done_compressed_packet)
|
||||
!= pkt->size) {
|
||||
HAL_MSG_ERROR("hal_process_session_ftb_done:"
|
||||
"bad_pkt_size");
|
||||
HAL_MSG_ERROR("%s: bad_pkt_size", __func__);
|
||||
return;
|
||||
} else if (pkt->error_type != HFI_ERR_NONE) {
|
||||
HAL_MSG_ERROR("%s: got buffer back with error %x",
|
||||
__func__, pkt->error_type);
|
||||
/* Proceed with the FBD */
|
||||
}
|
||||
|
||||
data_done.device_id = device->device_id;
|
||||
|
|
|
@ -76,6 +76,8 @@ struct msm_nand_chip {
|
|||
uint32_t ecc_bch_cfg;
|
||||
uint32_t ecc_parity_bytes;
|
||||
unsigned cw_size;
|
||||
unsigned int uncorrectable_bit_mask;
|
||||
unsigned int num_err_mask;
|
||||
};
|
||||
|
||||
#define CFG1_WIDE_FLASH (1U << 1)
|
||||
|
@ -1111,9 +1113,8 @@ static int msm_nand_read_oob(struct mtd_info *mtd, loff_t from,
|
|||
}
|
||||
if (pageerr) {
|
||||
for (n = start_sector; n < cwperpage; n++) {
|
||||
if (enable_bch_ecc ?
|
||||
(dma_buffer->data.result[n].buffer_status & 0x10) :
|
||||
(dma_buffer->data.result[n].buffer_status & 0x8)) {
|
||||
if (dma_buffer->data.result[n].buffer_status &
|
||||
chip->uncorrectable_bit_mask) {
|
||||
/* not thread safe */
|
||||
mtd->ecc_stats.failed++;
|
||||
pageerr = -EBADMSG;
|
||||
|
@ -1123,9 +1124,9 @@ static int msm_nand_read_oob(struct mtd_info *mtd, loff_t from,
|
|||
}
|
||||
if (!rawerr) { /* check for corretable errors */
|
||||
for (n = start_sector; n < cwperpage; n++) {
|
||||
ecc_errors = enable_bch_ecc ?
|
||||
(dma_buffer->data.result[n].buffer_status & 0xF) :
|
||||
(dma_buffer->data.result[n].buffer_status & 0x7);
|
||||
ecc_errors =
|
||||
(dma_buffer->data.result[n].buffer_status
|
||||
& chip->num_err_mask);
|
||||
if (ecc_errors) {
|
||||
total_ecc_errors += ecc_errors;
|
||||
/* not thread safe */
|
||||
|
@ -1893,7 +1894,7 @@ static int msm_nand_read_oob_dualnandc(struct mtd_info *mtd, loff_t from,
|
|||
if (pageerr) {
|
||||
for (n = start_sector; n < cwperpage; n++) {
|
||||
if (dma_buffer->data.result[n].buffer_status
|
||||
& MSM_NAND_BUF_STAT_UNCRCTBL_ERR) {
|
||||
& chip->uncorrectable_bit_mask) {
|
||||
/* not thread safe */
|
||||
mtd->ecc_stats.failed++;
|
||||
pageerr = -EBADMSG;
|
||||
|
@ -1905,7 +1906,7 @@ static int msm_nand_read_oob_dualnandc(struct mtd_info *mtd, loff_t from,
|
|||
for (n = start_sector; n < cwperpage; n++) {
|
||||
ecc_errors = dma_buffer->data.
|
||||
result[n].buffer_status
|
||||
& MSM_NAND_BUF_STAT_NUM_ERR_MASK;
|
||||
& chip->num_err_mask;
|
||||
if (ecc_errors) {
|
||||
total_ecc_errors += ecc_errors;
|
||||
/* not thread safe */
|
||||
|
@ -7043,6 +7044,15 @@ no_dual_nand_ctlr_support:
|
|||
pr_info("%s: allocated dma buffer at %p, dma_addr %x\n",
|
||||
__func__, info->msm_nand.dma_buffer, info->msm_nand.dma_addr);
|
||||
|
||||
/* Let default be VERSION_1 for backward compatibility */
|
||||
info->msm_nand.uncorrectable_bit_mask = BIT(3);
|
||||
info->msm_nand.num_err_mask = 0x7;
|
||||
|
||||
if (plat_data && (plat_data->version == VERSION_2)) {
|
||||
info->msm_nand.uncorrectable_bit_mask = BIT(8);
|
||||
info->msm_nand.num_err_mask = 0x1F;
|
||||
}
|
||||
|
||||
info->mtd.name = dev_name(&pdev->dev);
|
||||
info->mtd.priv = &info->msm_nand;
|
||||
info->mtd.owner = THIS_MODULE;
|
||||
|
|
|
@ -187,9 +187,6 @@ extern unsigned long ebi2_register_base;
|
|||
#define EBI2_CFG_REG EBI2_REG(0x0004)
|
||||
#define EBI2_NAND_ADM_MUX EBI2_REG(0x005C)
|
||||
|
||||
#define MSM_NAND_BUF_STAT_UNCRCTBL_ERR (1 << 8)
|
||||
#define MSM_NAND_BUF_STAT_NUM_ERR_MASK (enable_bch_ecc ? 0x1F : 0x0F)
|
||||
|
||||
extern struct flash_platform_data msm_nand_data;
|
||||
|
||||
#endif
|
||||
|
|
|
@ -209,6 +209,7 @@ static union rpc_reply_batt_chg rep_batt_chg;
|
|||
struct msm_battery_info {
|
||||
u32 voltage_max_design;
|
||||
u32 voltage_min_design;
|
||||
u32 voltage_fail_safe;
|
||||
u32 chg_api_version;
|
||||
u32 batt_technology;
|
||||
u32 batt_api_version;
|
||||
|
@ -760,8 +761,10 @@ void msm_batt_early_suspend(struct early_suspend *h)
|
|||
|
||||
if (msm_batt_info.batt_handle != INVALID_BATT_HANDLE) {
|
||||
rc = msm_batt_modify_client(msm_batt_info.batt_handle,
|
||||
BATTERY_LOW, BATTERY_VOLTAGE_BELOW_THIS_LEVEL,
|
||||
BATTERY_CB_ID_LOW_VOL, BATTERY_LOW);
|
||||
msm_batt_info.voltage_fail_safe,
|
||||
BATTERY_VOLTAGE_BELOW_THIS_LEVEL,
|
||||
BATTERY_CB_ID_LOW_VOL,
|
||||
msm_batt_info.voltage_fail_safe);
|
||||
|
||||
if (rc < 0) {
|
||||
pr_err("%s: msm_batt_modify_client. rc=%d\n",
|
||||
|
@ -784,8 +787,9 @@ void msm_batt_late_resume(struct early_suspend *h)
|
|||
|
||||
if (msm_batt_info.batt_handle != INVALID_BATT_HANDLE) {
|
||||
rc = msm_batt_modify_client(msm_batt_info.batt_handle,
|
||||
BATTERY_LOW, BATTERY_ALL_ACTIVITY,
|
||||
BATTERY_CB_ID_ALL_ACTIV, BATTERY_ALL_ACTIVITY);
|
||||
msm_batt_info.voltage_fail_safe,
|
||||
BATTERY_ALL_ACTIVITY,
|
||||
BATTERY_CB_ID_ALL_ACTIV, BATTERY_ALL_ACTIVITY);
|
||||
if (rc < 0) {
|
||||
pr_err("%s: msm_batt_modify_client FAIL rc=%d\n",
|
||||
__func__, rc);
|
||||
|
@ -1373,6 +1377,8 @@ static int __devinit msm_batt_probe(struct platform_device *pdev)
|
|||
|
||||
msm_batt_info.voltage_max_design = pdata->voltage_max_design;
|
||||
msm_batt_info.voltage_min_design = pdata->voltage_min_design;
|
||||
msm_batt_info.voltage_fail_safe = pdata->voltage_fail_safe;
|
||||
|
||||
msm_batt_info.batt_technology = pdata->batt_technology;
|
||||
msm_batt_info.calculate_capacity = pdata->calculate_capacity;
|
||||
|
||||
|
@ -1380,6 +1386,8 @@ static int __devinit msm_batt_probe(struct platform_device *pdev)
|
|||
msm_batt_info.voltage_min_design = BATTERY_LOW;
|
||||
if (!msm_batt_info.voltage_max_design)
|
||||
msm_batt_info.voltage_max_design = BATTERY_HIGH;
|
||||
if (!msm_batt_info.voltage_fail_safe)
|
||||
msm_batt_info.voltage_fail_safe = BATTERY_LOW;
|
||||
|
||||
if (msm_batt_info.batt_technology == POWER_SUPPLY_TECHNOLOGY_UNKNOWN)
|
||||
msm_batt_info.batt_technology = POWER_SUPPLY_TECHNOLOGY_LION;
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
static void of_get_regulation_constraints(struct device_node *np,
|
||||
|
@ -61,6 +62,71 @@ static void of_get_regulation_constraints(struct device_node *np,
|
|||
constraints->valid_ops_mask |= REGULATOR_CHANGE_STATUS;
|
||||
}
|
||||
|
||||
static const char *consumer_supply_prop_name = "qcom,consumer-supplies";
|
||||
#define MAX_DEV_NAME_LEN 256
|
||||
/*
|
||||
* Fill in regulator init_data based on qcom legacy requirements.
|
||||
*/
|
||||
static int of_get_qcom_regulator_init_data(struct device *dev,
|
||||
struct regulator_init_data **init_data)
|
||||
{
|
||||
struct device_node *node = dev->of_node;
|
||||
struct regulator_consumer_supply *consumer_supplies;
|
||||
int i, rc, num_consumer_supplies, array_len;
|
||||
|
||||
array_len = of_property_count_strings(node, consumer_supply_prop_name);
|
||||
if (array_len > 0) {
|
||||
/* Array length must be divisible by 2. */
|
||||
if (array_len & 1) {
|
||||
dev_err(dev, "error: %s device node property value "
|
||||
"contains an odd number of elements: %d\n",
|
||||
consumer_supply_prop_name, array_len);
|
||||
return -EINVAL;
|
||||
}
|
||||
num_consumer_supplies = array_len / 2;
|
||||
|
||||
consumer_supplies = devm_kzalloc(dev,
|
||||
sizeof(struct regulator_consumer_supply)
|
||||
* num_consumer_supplies, GFP_KERNEL);
|
||||
if (consumer_supplies == NULL) {
|
||||
dev_err(dev, "devm_kzalloc failed\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
for (i = 0; i < num_consumer_supplies; i++) {
|
||||
rc = of_property_read_string_index(node,
|
||||
consumer_supply_prop_name, i * 2,
|
||||
&consumer_supplies[i].supply);
|
||||
if (rc) {
|
||||
dev_err(dev, "of_property_read_string_index "
|
||||
"failed, rc=%d\n", rc);
|
||||
devm_kfree(dev, consumer_supplies);
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = of_property_read_string_index(node,
|
||||
consumer_supply_prop_name, (i * 2) + 1,
|
||||
&consumer_supplies[i].dev_name);
|
||||
if (rc) {
|
||||
dev_err(dev, "of_property_read_string_index "
|
||||
"failed, rc=%d\n", rc);
|
||||
devm_kfree(dev, consumer_supplies);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* Treat dev_name = "" as a wildcard. */
|
||||
if (strnlen(consumer_supplies[i].dev_name,
|
||||
MAX_DEV_NAME_LEN) == 0)
|
||||
consumer_supplies[i].dev_name = NULL;
|
||||
}
|
||||
|
||||
(*init_data)->consumer_supplies = consumer_supplies;
|
||||
(*init_data)->num_consumer_supplies = num_consumer_supplies;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* of_get_regulator_init_data - extract regulator_init_data structure info
|
||||
* @dev: device requesting for regulator_init_data
|
||||
|
@ -73,6 +139,7 @@ struct regulator_init_data *of_get_regulator_init_data(struct device *dev,
|
|||
struct device_node *node)
|
||||
{
|
||||
struct regulator_init_data *init_data;
|
||||
int rc;
|
||||
|
||||
if (!node)
|
||||
return NULL;
|
||||
|
@ -82,6 +149,12 @@ struct regulator_init_data *of_get_regulator_init_data(struct device *dev,
|
|||
return NULL; /* Out of memory? */
|
||||
|
||||
of_get_regulation_constraints(node, &init_data);
|
||||
rc = of_get_qcom_regulator_init_data(dev, &init_data);
|
||||
if (rc) {
|
||||
devm_kfree(dev, init_data);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return init_data;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(of_get_regulator_init_data);
|
||||
|
|
|
@ -595,6 +595,29 @@ static int pm8xxx_vreg_is_enabled(struct regulator_dev *rdev)
|
|||
return enabled;
|
||||
}
|
||||
|
||||
/*
|
||||
* Adds delay when increasing in voltage to account for the slew rate of
|
||||
* the regulator.
|
||||
*/
|
||||
static void pm8xxx_vreg_delay_for_slew(struct pm8xxx_vreg *vreg, int prev_uV,
|
||||
int new_uV)
|
||||
{
|
||||
int delay;
|
||||
|
||||
if (vreg->pdata.slew_rate == 0 || new_uV <= prev_uV ||
|
||||
!_pm8xxx_vreg_is_enabled(vreg))
|
||||
return;
|
||||
|
||||
delay = DIV_ROUND_UP(new_uV - prev_uV, vreg->pdata.slew_rate);
|
||||
|
||||
if (delay >= 1000) {
|
||||
mdelay(delay / 1000);
|
||||
udelay(delay % 1000);
|
||||
} else {
|
||||
udelay(delay);
|
||||
}
|
||||
}
|
||||
|
||||
static int pm8xxx_pldo_get_voltage(struct regulator_dev *rdev)
|
||||
{
|
||||
struct pm8xxx_vreg *vreg = rdev_get_drvdata(rdev);
|
||||
|
@ -655,7 +678,7 @@ static int pm8xxx_pldo_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
{
|
||||
struct pm8xxx_vreg *vreg = rdev_get_drvdata(rdev);
|
||||
int rc = 0, uV = min_uV;
|
||||
int vmin;
|
||||
int vmin, prev_uV;
|
||||
unsigned vprog, fine_step;
|
||||
u8 range_ext, range_sel, fine_step_reg, prev_reg;
|
||||
bool reg_changed = false;
|
||||
|
@ -699,6 +722,8 @@ static int pm8xxx_pldo_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
prev_uV = pm8xxx_pldo_get_voltage(rdev);
|
||||
|
||||
mutex_lock(&vreg->pc_lock);
|
||||
|
||||
/* Write fine step, range select and program voltage update. */
|
||||
|
@ -746,8 +771,10 @@ bail:
|
|||
|
||||
if (rc)
|
||||
vreg_err(vreg, "pm8xxx_vreg_masked_write failed, rc=%d\n", rc);
|
||||
else
|
||||
else {
|
||||
pm8xxx_vreg_delay_for_slew(vreg, prev_uV, uV);
|
||||
pm8xxx_vreg_show_state(rdev, PM8XXX_REGULATOR_ACTION_VOLTAGE);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
@ -783,7 +810,7 @@ static int pm8xxx_nldo_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
{
|
||||
struct pm8xxx_vreg *vreg = rdev_get_drvdata(rdev);
|
||||
unsigned vprog, fine_step_reg, prev_reg;
|
||||
int rc;
|
||||
int rc, prev_uV;
|
||||
int uV = min_uV;
|
||||
|
||||
if (uV < NLDO_UV_MIN && max_uV >= NLDO_UV_MIN)
|
||||
|
@ -808,6 +835,8 @@ static int pm8xxx_nldo_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
prev_uV = pm8xxx_nldo_get_voltage(rdev);
|
||||
|
||||
mutex_lock(&vreg->pc_lock);
|
||||
|
||||
/* Write fine step. */
|
||||
|
@ -840,8 +869,10 @@ bail:
|
|||
|
||||
if (rc)
|
||||
vreg_err(vreg, "pm8xxx_vreg_masked_write failed, rc=%d\n", rc);
|
||||
else
|
||||
else {
|
||||
pm8xxx_vreg_delay_for_slew(vreg, prev_uV, uV);
|
||||
pm8xxx_vreg_show_state(rdev, PM8XXX_REGULATOR_ACTION_VOLTAGE);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
@ -897,7 +928,7 @@ static int _pm8xxx_nldo1200_set_voltage(struct pm8xxx_vreg *vreg, int min_uV,
|
|||
int max_uV)
|
||||
{
|
||||
u8 vprog, range;
|
||||
int rc;
|
||||
int rc, prev_uV;
|
||||
int uV = min_uV;
|
||||
|
||||
if (uV < NLDO1200_LOW_UV_MIN && max_uV >= NLDO1200_LOW_UV_MIN)
|
||||
|
@ -931,6 +962,8 @@ static int _pm8xxx_nldo1200_set_voltage(struct pm8xxx_vreg *vreg, int min_uV,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
prev_uV = _pm8xxx_nldo1200_get_voltage(vreg);
|
||||
|
||||
/* Set to advanced mode */
|
||||
rc = pm8xxx_vreg_masked_write(vreg, vreg->test_addr,
|
||||
NLDO1200_ADVANCED_MODE | REGULATOR_BANK_SEL(2)
|
||||
|
@ -948,6 +981,7 @@ static int _pm8xxx_nldo1200_set_voltage(struct pm8xxx_vreg *vreg, int min_uV,
|
|||
|
||||
vreg->save_uV = uV;
|
||||
|
||||
pm8xxx_vreg_delay_for_slew(vreg, prev_uV, uV);
|
||||
bail:
|
||||
if (rc)
|
||||
vreg_err(vreg, "pm8xxx_vreg_masked_write failed, rc=%d\n", rc);
|
||||
|
@ -1208,6 +1242,9 @@ static int pm8xxx_smps_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
{
|
||||
struct pm8xxx_vreg *vreg = rdev_get_drvdata(rdev);
|
||||
int rc = 0;
|
||||
int prev_uV, new_uV;
|
||||
|
||||
prev_uV = pm8xxx_smps_get_voltage(rdev);
|
||||
|
||||
mutex_lock(&vreg->pc_lock);
|
||||
|
||||
|
@ -1218,8 +1255,12 @@ static int pm8xxx_smps_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
|
||||
mutex_unlock(&vreg->pc_lock);
|
||||
|
||||
if (!rc)
|
||||
new_uV = pm8xxx_smps_get_voltage(rdev);
|
||||
|
||||
if (!rc) {
|
||||
pm8xxx_vreg_delay_for_slew(vreg, prev_uV, new_uV);
|
||||
pm8xxx_vreg_show_state(rdev, PM8XXX_REGULATOR_ACTION_VOLTAGE);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
@ -1291,6 +1332,7 @@ static int _pm8xxx_ftsmps_set_voltage(struct pm8xxx_vreg *vreg, int min_uV,
|
|||
int rc = 0;
|
||||
u8 vprog, band;
|
||||
int uV = min_uV;
|
||||
int prev_uV;
|
||||
|
||||
if (uV < FTSMPS_BAND1_UV_MIN && max_uV >= FTSMPS_BAND1_UV_MIN)
|
||||
uV = FTSMPS_BAND1_UV_MIN;
|
||||
|
@ -1336,6 +1378,8 @@ static int _pm8xxx_ftsmps_set_voltage(struct pm8xxx_vreg *vreg, int min_uV,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
prev_uV = _pm8xxx_ftsmps_get_voltage(vreg);
|
||||
|
||||
/*
|
||||
* Do not set voltage if regulator is currently disabled because doing
|
||||
* so will enable it.
|
||||
|
@ -1358,6 +1402,8 @@ static int _pm8xxx_ftsmps_set_voltage(struct pm8xxx_vreg *vreg, int min_uV,
|
|||
|
||||
vreg->save_uV = uV;
|
||||
|
||||
pm8xxx_vreg_delay_for_slew(vreg, prev_uV, uV);
|
||||
|
||||
bail:
|
||||
if (rc)
|
||||
vreg_err(vreg, "pm8xxx_vreg_masked_write failed, rc=%d\n", rc);
|
||||
|
@ -1402,7 +1448,7 @@ static int pm8xxx_ncp_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
int max_uV, unsigned *selector)
|
||||
{
|
||||
struct pm8xxx_vreg *vreg = rdev_get_drvdata(rdev);
|
||||
int rc;
|
||||
int rc, prev_uV;
|
||||
int uV = min_uV;
|
||||
u8 val;
|
||||
|
||||
|
@ -1426,13 +1472,17 @@ static int pm8xxx_ncp_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
prev_uV = pm8xxx_ncp_get_voltage(rdev);
|
||||
|
||||
/* voltage setting */
|
||||
rc = pm8xxx_vreg_masked_write(vreg, vreg->ctrl_addr, val,
|
||||
NCP_VPROG_MASK, &vreg->ctrl_reg);
|
||||
if (rc)
|
||||
vreg_err(vreg, "pm8xxx_vreg_masked_write failed, rc=%d\n", rc);
|
||||
else
|
||||
else {
|
||||
pm8xxx_vreg_delay_for_slew(vreg, prev_uV, uV);
|
||||
pm8xxx_vreg_show_state(rdev, PM8XXX_REGULATOR_ACTION_VOLTAGE);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
@ -1460,7 +1510,7 @@ static int pm8xxx_boost_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
int max_uV, unsigned *selector)
|
||||
{
|
||||
struct pm8xxx_vreg *vreg = rdev_get_drvdata(rdev);
|
||||
int rc;
|
||||
int rc, prev_uV;
|
||||
int uV = min_uV;
|
||||
u8 val;
|
||||
|
||||
|
@ -1484,13 +1534,17 @@ static int pm8xxx_boost_set_voltage(struct regulator_dev *rdev, int min_uV,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
prev_uV = pm8xxx_boost_get_voltage(rdev);
|
||||
|
||||
/* voltage setting */
|
||||
rc = pm8xxx_vreg_masked_write(vreg, vreg->ctrl_addr, val,
|
||||
BOOST_VPROG_MASK, &vreg->ctrl_reg);
|
||||
if (rc)
|
||||
vreg_err(vreg, "pm8xxx_vreg_masked_write failed, rc=%d\n", rc);
|
||||
else
|
||||
else {
|
||||
pm8xxx_vreg_delay_for_slew(vreg, prev_uV, uV);
|
||||
pm8xxx_vreg_show_state(rdev, PM8XXX_REGULATOR_ACTION_VOLTAGE);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
@ -3151,6 +3205,16 @@ static int __devinit pm8xxx_vreg_probe(struct platform_device *pdev)
|
|||
sizeof(struct pm8xxx_regulator_platform_data));
|
||||
vreg->pdata.pin_ctrl = pin_ctrl;
|
||||
vreg->pdata.pin_fn = pin_fn;
|
||||
/*
|
||||
* If slew_rate isn't specified but enable_time is, then set
|
||||
* slew_rate = max_uV / enable_time.
|
||||
*/
|
||||
if (vreg->pdata.enable_time > 0
|
||||
&& vreg->pdata.init_data.constraints.max_uV > 0
|
||||
&& vreg->pdata.slew_rate <= 0)
|
||||
vreg->pdata.slew_rate =
|
||||
DIV_ROUND_UP(vreg->pdata.init_data.constraints.max_uV,
|
||||
vreg->pdata.enable_time);
|
||||
vreg->dev = &pdev->dev;
|
||||
} else {
|
||||
/* Pin control regulator */
|
||||
|
|
|
@ -262,8 +262,7 @@ static void smux_loopback_rx_worker(struct work_struct *work)
|
|||
smux_init_pkt(&reply_pkt);
|
||||
reply_pkt.hdr.lcid = lcid;
|
||||
reply_pkt.hdr.cmd = SMUX_CMD_PWR_CTL;
|
||||
reply_pkt.hdr.flags = SMUX_CMD_PWR_CTL_SLEEP_REQ
|
||||
| SMUX_CMD_PWR_CTL_ACK;
|
||||
reply_pkt.hdr.flags = SMUX_CMD_PWR_CTL_ACK;
|
||||
reply_pkt.hdr.payload_len = 0;
|
||||
reply_pkt.payload = NULL;
|
||||
reply_pkt.hdr.pad_len = pkt->hdr.pad_len;
|
||||
|
|
|
@ -78,7 +78,6 @@ enum {
|
|||
/* Power command flags */
|
||||
enum {
|
||||
SMUX_CMD_PWR_CTL_ACK = 1 << 0,
|
||||
SMUX_CMD_PWR_CTL_SLEEP_REQ = 1 << 1,
|
||||
};
|
||||
|
||||
/* Local logical channel states */
|
||||
|
|
|
@ -1599,6 +1599,9 @@ void usb_hcd_giveback_urb(struct usb_hcd *hcd, struct urb *urb, int status)
|
|||
usbmon_urb_complete(&hcd->self, urb, status);
|
||||
usb_unanchor_urb(urb);
|
||||
|
||||
if (hcd->driver->log_urb_complete)
|
||||
hcd->driver->log_urb_complete(urb, "C", status);
|
||||
|
||||
/* pass ownership to the completion handler */
|
||||
urb->status = status;
|
||||
urb->complete (urb);
|
||||
|
|
|
@ -691,6 +691,9 @@ static int ehci_init(struct usb_hcd *hcd)
|
|||
hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
|
||||
|
||||
/* clear interrupt enables, set irq latency */
|
||||
if (ehci->max_log2_irq_thresh)
|
||||
log2_irq_thresh = ehci->max_log2_irq_thresh;
|
||||
|
||||
if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
|
||||
log2_irq_thresh = 0;
|
||||
temp = 1 << (16 + log2_irq_thresh);
|
||||
|
|
|
@ -39,6 +39,7 @@
|
|||
#include <mach/msm_iomap.h>
|
||||
#include <mach/msm_xo.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/cpu.h>
|
||||
|
||||
#define MSM_USB_BASE (hcd->regs)
|
||||
|
||||
|
@ -64,6 +65,183 @@ struct msm_hsic_hcd {
|
|||
};
|
||||
|
||||
static bool debug_bus_voting_enabled = true;
|
||||
|
||||
static unsigned int enable_dbg_log = 1;
|
||||
module_param(enable_dbg_log, uint, S_IRUGO | S_IWUSR);
|
||||
/*by default log ep0 and efs sync ep*/
|
||||
static unsigned int ep_addr_rxdbg_mask = 9;
|
||||
module_param(ep_addr_rxdbg_mask, uint, S_IRUGO | S_IWUSR);
|
||||
static unsigned int ep_addr_txdbg_mask = 9;
|
||||
module_param(ep_addr_txdbg_mask, uint, S_IRUGO | S_IWUSR);
|
||||
|
||||
/* Maximum debug message length */
|
||||
#define DBG_MSG_LEN 100UL
|
||||
|
||||
/* Maximum number of messages */
|
||||
#define DBG_MAX_MSG 256UL
|
||||
|
||||
#define TIME_BUF_LEN 20
|
||||
|
||||
enum event_type {
|
||||
EVENT_UNDEF = -1,
|
||||
URB_SUBMIT,
|
||||
URB_COMPLETE,
|
||||
EVENT_NONE,
|
||||
};
|
||||
|
||||
#define EVENT_STR_LEN 5
|
||||
|
||||
static char *event_to_str(enum event_type e)
|
||||
{
|
||||
switch (e) {
|
||||
case URB_SUBMIT:
|
||||
return "S";
|
||||
case URB_COMPLETE:
|
||||
return "C";
|
||||
case EVENT_NONE:
|
||||
return "NONE";
|
||||
default:
|
||||
return "UNDEF";
|
||||
}
|
||||
}
|
||||
|
||||
static enum event_type str_to_event(const char *name)
|
||||
{
|
||||
if (!strncasecmp("S", name, EVENT_STR_LEN))
|
||||
return URB_SUBMIT;
|
||||
if (!strncasecmp("C", name, EVENT_STR_LEN))
|
||||
return URB_COMPLETE;
|
||||
if (!strncasecmp("", name, EVENT_STR_LEN))
|
||||
return EVENT_NONE;
|
||||
|
||||
return EVENT_UNDEF;
|
||||
}
|
||||
|
||||
/*log ep0 activity*/
|
||||
static struct {
|
||||
char (buf[DBG_MAX_MSG])[DBG_MSG_LEN]; /* buffer */
|
||||
unsigned idx; /* index */
|
||||
rwlock_t lck; /* lock */
|
||||
} dbg_hsic_ctrl = {
|
||||
.idx = 0,
|
||||
.lck = __RW_LOCK_UNLOCKED(lck)
|
||||
};
|
||||
|
||||
static struct {
|
||||
char (buf[DBG_MAX_MSG])[DBG_MSG_LEN]; /* buffer */
|
||||
unsigned idx; /* index */
|
||||
rwlock_t lck; /* lock */
|
||||
} dbg_hsic_data = {
|
||||
.idx = 0,
|
||||
.lck = __RW_LOCK_UNLOCKED(lck)
|
||||
};
|
||||
|
||||
/**
|
||||
* dbg_inc: increments debug event index
|
||||
* @idx: buffer index
|
||||
*/
|
||||
static void dbg_inc(unsigned *idx)
|
||||
{
|
||||
*idx = (*idx + 1) & (DBG_MAX_MSG-1);
|
||||
}
|
||||
|
||||
/*get_timestamp - returns time of day in us */
|
||||
static char *get_timestamp(char *tbuf)
|
||||
{
|
||||
unsigned long long t;
|
||||
unsigned long nanosec_rem;
|
||||
|
||||
t = cpu_clock(smp_processor_id());
|
||||
nanosec_rem = do_div(t, 1000000000)/1000;
|
||||
scnprintf(tbuf, TIME_BUF_LEN, "[%5lu.%06lu] ", (unsigned long)t,
|
||||
nanosec_rem);
|
||||
return tbuf;
|
||||
}
|
||||
|
||||
static int allow_dbg_log(int ep_addr)
|
||||
{
|
||||
int dir, num;
|
||||
|
||||
dir = ep_addr & USB_DIR_IN ? USB_DIR_IN : USB_DIR_OUT;
|
||||
num = ep_addr & ~USB_DIR_IN;
|
||||
num = 1 << num;
|
||||
|
||||
if ((dir == USB_DIR_IN) && (num & ep_addr_rxdbg_mask))
|
||||
return 1;
|
||||
if ((dir == USB_DIR_OUT) && (num & ep_addr_txdbg_mask))
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void dbg_log_event(struct urb *urb, char * event, unsigned extra)
|
||||
{
|
||||
unsigned long flags;
|
||||
int ep_addr;
|
||||
char tbuf[TIME_BUF_LEN];
|
||||
|
||||
if (!enable_dbg_log)
|
||||
return;
|
||||
|
||||
if (!urb) {
|
||||
write_lock_irqsave(&dbg_hsic_ctrl.lck, flags);
|
||||
scnprintf(dbg_hsic_ctrl.buf[dbg_hsic_ctrl.idx], DBG_MSG_LEN,
|
||||
"%s: %s : %u\n", get_timestamp(tbuf), event, extra);
|
||||
dbg_inc(&dbg_hsic_ctrl.idx);
|
||||
write_unlock_irqrestore(&dbg_hsic_ctrl.lck, flags);
|
||||
return;
|
||||
}
|
||||
|
||||
ep_addr = urb->ep->desc.bEndpointAddress;
|
||||
if (!allow_dbg_log(ep_addr))
|
||||
return;
|
||||
|
||||
if ((ep_addr & 0x0f) == 0x0) {
|
||||
/*submit event*/
|
||||
if (!str_to_event(event)) {
|
||||
write_lock_irqsave(&dbg_hsic_ctrl.lck, flags);
|
||||
scnprintf(dbg_hsic_ctrl.buf[dbg_hsic_ctrl.idx],
|
||||
DBG_MSG_LEN, "%s: [%s : %p]:[%s] "
|
||||
"%02x %02x %04x %04x %04x %u %d\n",
|
||||
get_timestamp(tbuf), event, urb,
|
||||
(ep_addr & USB_DIR_IN) ? "in" : "out",
|
||||
urb->setup_packet[0], urb->setup_packet[1],
|
||||
(urb->setup_packet[3] << 8) |
|
||||
urb->setup_packet[2],
|
||||
(urb->setup_packet[5] << 8) |
|
||||
urb->setup_packet[4],
|
||||
(urb->setup_packet[7] << 8) |
|
||||
urb->setup_packet[6],
|
||||
urb->transfer_buffer_length, urb->status);
|
||||
|
||||
dbg_inc(&dbg_hsic_ctrl.idx);
|
||||
write_unlock_irqrestore(&dbg_hsic_ctrl.lck, flags);
|
||||
} else {
|
||||
write_lock_irqsave(&dbg_hsic_ctrl.lck, flags);
|
||||
scnprintf(dbg_hsic_ctrl.buf[dbg_hsic_ctrl.idx],
|
||||
DBG_MSG_LEN, "%s: [%s : %p]:[%s] %u %d\n",
|
||||
get_timestamp(tbuf), event, urb,
|
||||
(ep_addr & USB_DIR_IN) ? "in" : "out",
|
||||
urb->actual_length, extra);
|
||||
|
||||
dbg_inc(&dbg_hsic_ctrl.idx);
|
||||
write_unlock_irqrestore(&dbg_hsic_ctrl.lck, flags);
|
||||
}
|
||||
} else {
|
||||
write_lock_irqsave(&dbg_hsic_data.lck, flags);
|
||||
scnprintf(dbg_hsic_data.buf[dbg_hsic_data.idx], DBG_MSG_LEN,
|
||||
"%s: [%s : %p]:ep%d[%s] %u %d\n",
|
||||
get_timestamp(tbuf), event, urb, ep_addr & 0x0f,
|
||||
(ep_addr & USB_DIR_IN) ? "in" : "out",
|
||||
str_to_event(event) ? urb->actual_length :
|
||||
urb->transfer_buffer_length,
|
||||
str_to_event(event) ? extra : urb->status);
|
||||
|
||||
dbg_inc(&dbg_hsic_data.idx);
|
||||
write_unlock_irqrestore(&dbg_hsic_data.lck, flags);
|
||||
}
|
||||
}
|
||||
|
||||
static inline struct msm_hsic_hcd *hcd_to_hsic(struct usb_hcd *hcd)
|
||||
{
|
||||
return (struct msm_hsic_hcd *) (hcd->hcd_priv);
|
||||
|
@ -589,6 +767,25 @@ static int ehci_hsic_reset(struct usb_hcd *hcd)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ehci_hsic_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
|
||||
gfp_t mem_flags)
|
||||
{
|
||||
dbg_log_event(urb, event_to_str(URB_SUBMIT), 0);
|
||||
return ehci_urb_enqueue(hcd, urb, mem_flags);
|
||||
}
|
||||
|
||||
static int ehci_hsic_bus_suspend(struct usb_hcd *hcd)
|
||||
{
|
||||
dbg_log_event(NULL, "Suspend RH", 0);
|
||||
return ehci_bus_suspend(hcd);
|
||||
}
|
||||
|
||||
static int ehci_hsic_bus_resume(struct usb_hcd *hcd)
|
||||
{
|
||||
dbg_log_event(NULL, "Resume RH", 0);
|
||||
return ehci_bus_resume(hcd);
|
||||
}
|
||||
|
||||
static struct hc_driver msm_hsic_driver = {
|
||||
.description = hcd_name,
|
||||
.product_desc = "Qualcomm EHCI Host Controller using HSIC",
|
||||
|
@ -609,7 +806,7 @@ static struct hc_driver msm_hsic_driver = {
|
|||
/*
|
||||
* managing i/o requests and associated device resources
|
||||
*/
|
||||
.urb_enqueue = ehci_urb_enqueue,
|
||||
.urb_enqueue = ehci_hsic_urb_enqueue,
|
||||
.urb_dequeue = ehci_urb_dequeue,
|
||||
.endpoint_disable = ehci_endpoint_disable,
|
||||
.endpoint_reset = ehci_endpoint_reset,
|
||||
|
@ -631,8 +828,10 @@ static struct hc_driver msm_hsic_driver = {
|
|||
/*
|
||||
* PM support
|
||||
*/
|
||||
.bus_suspend = ehci_bus_suspend,
|
||||
.bus_resume = ehci_bus_resume,
|
||||
.bus_suspend = ehci_hsic_bus_suspend,
|
||||
.bus_resume = ehci_hsic_bus_resume,
|
||||
|
||||
.log_urb_complete = dbg_log_event,
|
||||
};
|
||||
|
||||
static int msm_hsic_init_clocks(struct msm_hsic_hcd *mehci, u32 init)
|
||||
|
@ -729,6 +928,7 @@ static irqreturn_t msm_hsic_wakeup_irq(int irq, void *data)
|
|||
struct msm_hsic_hcd *mehci = data;
|
||||
|
||||
mehci->wakeup_int_cnt++;
|
||||
dbg_log_event(NULL, "Remote Wakeup IRQ", mehci->wakeup_int_cnt);
|
||||
dev_dbg(mehci->dev, "%s: hsic remote wakeup interrupt cnt: %u\n",
|
||||
__func__, mehci->wakeup_int_cnt);
|
||||
|
||||
|
@ -822,6 +1022,68 @@ const struct file_operations ehci_hsic_msm_wakeup_cnt_fops = {
|
|||
.release = single_release,
|
||||
};
|
||||
|
||||
static int ehci_hsic_msm_data_events_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned i;
|
||||
|
||||
read_lock_irqsave(&dbg_hsic_data.lck, flags);
|
||||
|
||||
i = dbg_hsic_data.idx;
|
||||
for (dbg_inc(&i); i != dbg_hsic_data.idx; dbg_inc(&i)) {
|
||||
if (!strnlen(dbg_hsic_data.buf[i], DBG_MSG_LEN))
|
||||
continue;
|
||||
seq_printf(s, "%s\n", dbg_hsic_data.buf[i]);
|
||||
}
|
||||
|
||||
read_unlock_irqrestore(&dbg_hsic_data.lck, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ehci_hsic_msm_data_events_open(struct inode *inode, struct file *f)
|
||||
{
|
||||
return single_open(f, ehci_hsic_msm_data_events_show, inode->i_private);
|
||||
}
|
||||
|
||||
const struct file_operations ehci_hsic_msm_dbg_data_fops = {
|
||||
.open = ehci_hsic_msm_data_events_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static int ehci_hsic_msm_ctrl_events_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned i;
|
||||
|
||||
read_lock_irqsave(&dbg_hsic_ctrl.lck, flags);
|
||||
|
||||
i = dbg_hsic_ctrl.idx;
|
||||
for (dbg_inc(&i); i != dbg_hsic_ctrl.idx; dbg_inc(&i)) {
|
||||
if (!strnlen(dbg_hsic_ctrl.buf[i], DBG_MSG_LEN))
|
||||
continue;
|
||||
seq_printf(s, "%s\n", dbg_hsic_ctrl.buf[i]);
|
||||
}
|
||||
|
||||
read_unlock_irqrestore(&dbg_hsic_ctrl.lck, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ehci_hsic_msm_ctrl_events_open(struct inode *inode, struct file *f)
|
||||
{
|
||||
return single_open(f, ehci_hsic_msm_ctrl_events_show, inode->i_private);
|
||||
}
|
||||
|
||||
const struct file_operations ehci_hsic_msm_dbg_ctrl_fops = {
|
||||
.open = ehci_hsic_msm_ctrl_events_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static struct dentry *ehci_hsic_msm_dbg_root;
|
||||
static int ehci_hsic_msm_debugfs_init(struct msm_hsic_hcd *mehci)
|
||||
{
|
||||
|
@ -852,6 +1114,26 @@ static int ehci_hsic_msm_debugfs_init(struct msm_hsic_hcd *mehci)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
ehci_hsic_msm_dentry = debugfs_create_file("show_ctrl_events",
|
||||
S_IRUGO,
|
||||
ehci_hsic_msm_dbg_root, mehci,
|
||||
&ehci_hsic_msm_dbg_ctrl_fops);
|
||||
|
||||
if (!ehci_hsic_msm_dentry) {
|
||||
debugfs_remove_recursive(ehci_hsic_msm_dbg_root);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ehci_hsic_msm_dentry = debugfs_create_file("show_data_events",
|
||||
S_IRUGO,
|
||||
ehci_hsic_msm_dbg_root, mehci,
|
||||
&ehci_hsic_msm_dbg_data_fops);
|
||||
|
||||
if (!ehci_hsic_msm_dentry) {
|
||||
debugfs_remove_recursive(ehci_hsic_msm_dbg_root);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -913,6 +1195,8 @@ static int __devinit ehci_hsic_msm_probe(struct platform_device *pdev)
|
|||
|
||||
mehci->ehci.susp_sof_bug = 1;
|
||||
|
||||
mehci->ehci.max_log2_irq_thresh = 6;
|
||||
|
||||
res = platform_get_resource_byname(pdev,
|
||||
IORESOURCE_IRQ,
|
||||
"peripheral_status_irq");
|
||||
|
@ -1075,6 +1359,8 @@ static int msm_hsic_pm_suspend(struct device *dev)
|
|||
|
||||
dev_dbg(dev, "ehci-msm-hsic PM suspend\n");
|
||||
|
||||
dbg_log_event(NULL, "PM Suspend", 0);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
enable_irq_wake(hcd->irq);
|
||||
|
||||
|
@ -1092,6 +1378,8 @@ static int msm_hsic_pm_resume(struct device *dev)
|
|||
struct usb_hcd *hcd = dev_get_drvdata(dev);
|
||||
struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
|
||||
|
||||
dbg_log_event(NULL, "PM Resume", 0);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
disable_irq_wake(hcd->irq);
|
||||
|
||||
|
@ -1121,6 +1409,9 @@ static int msm_hsic_runtime_suspend(struct device *dev)
|
|||
struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
|
||||
|
||||
dev_dbg(dev, "EHCI runtime suspend\n");
|
||||
|
||||
dbg_log_event(NULL, "Run Time PM Suspend", 0);
|
||||
|
||||
return msm_hsic_suspend(mehci);
|
||||
}
|
||||
|
||||
|
@ -1130,6 +1421,9 @@ static int msm_hsic_runtime_resume(struct device *dev)
|
|||
struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
|
||||
|
||||
dev_dbg(dev, "EHCI runtime resume\n");
|
||||
|
||||
dbg_log_event(NULL, "Run Time PM Resume", 0);
|
||||
|
||||
return msm_hsic_resume(mehci);
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -135,6 +135,8 @@ struct ehci_hcd { /* one per controller */
|
|||
ktime_t last_periodic_enable;
|
||||
u32 command;
|
||||
|
||||
unsigned max_log2_irq_thresh;
|
||||
|
||||
/* SILICON QUIRKS */
|
||||
unsigned no_selective_suspend:1;
|
||||
unsigned has_fsl_port_bug:1; /* FreeScale */
|
||||
|
|
|
@ -143,6 +143,7 @@ static int __init mipi_chimei_wuxga_init(void)
|
|||
pinfo->mipi.data_lane1 = true;
|
||||
pinfo->mipi.data_lane2 = true;
|
||||
pinfo->mipi.data_lane3 = true;
|
||||
pinfo->mipi.esc_byte_ratio = 6;
|
||||
|
||||
pinfo->mipi.mode = DSI_VIDEO_MODE;
|
||||
/*
|
||||
|
|
|
@ -130,6 +130,7 @@ static int __init mipi_chimei_wxga_init(void)
|
|||
pinfo->mipi.tx_eot_append = true;
|
||||
pinfo->mipi.t_clk_post = 34; /* Calculated */
|
||||
pinfo->mipi.t_clk_pre = 64; /* Calculated */
|
||||
pinfo->mipi.esc_byte_ratio = 4;
|
||||
|
||||
pinfo->mipi.dsi_phy_db = &dsi_video_mode_phy_db;
|
||||
|
||||
|
|
|
@ -36,6 +36,7 @@
|
|||
#include "mdp4.h"
|
||||
|
||||
u32 dsi_irq;
|
||||
u32 esc_byte_ratio;
|
||||
|
||||
static boolean tlmm_settings = FALSE;
|
||||
|
||||
|
@ -164,6 +165,7 @@ static int mipi_dsi_on(struct platform_device *pdev)
|
|||
fbi = mfd->fbi;
|
||||
var = &fbi->var;
|
||||
pinfo = &mfd->panel_info;
|
||||
esc_byte_ratio = pinfo->mipi.esc_byte_ratio;
|
||||
|
||||
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
|
||||
mipi_dsi_pdata->dsi_power_save(1);
|
||||
|
|
|
@ -126,6 +126,7 @@ enum dsi_trigger_type {
|
|||
extern struct device dsi_dev;
|
||||
extern int mipi_dsi_clk_on;
|
||||
extern u32 dsi_irq;
|
||||
extern u32 esc_byte_ratio;
|
||||
|
||||
extern void __iomem *periph_base;
|
||||
extern char *mmss_cc_base; /* mutimedia sub system clock control */
|
||||
|
|
|
@ -73,6 +73,7 @@ static int __init mipi_cmd_novatek_blue_qhd_pt_init(void)
|
|||
pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888;
|
||||
pinfo.mipi.vc = 0;
|
||||
pinfo.mipi.data_lane0 = TRUE;
|
||||
pinfo.mipi.esc_byte_ratio = 4;
|
||||
#if defined(NOVATEK_TWO_LANE)
|
||||
pinfo.mipi.data_lane1 = TRUE;
|
||||
#endif
|
||||
|
|
|
@ -73,6 +73,7 @@ static int __init mipi_video_novatek_qhd_pt_init(void)
|
|||
pinfo.mipi.vc = 0;
|
||||
pinfo.mipi.rgb_swap = DSI_RGB_SWAP_BGR;
|
||||
pinfo.mipi.data_lane0 = TRUE;
|
||||
pinfo.mipi.esc_byte_ratio = 4;
|
||||
#if defined(NOVATEK_TWO_LANE)
|
||||
pinfo.mipi.data_lane1 = TRUE;
|
||||
#endif
|
||||
|
|
|
@ -85,6 +85,7 @@ static int __init mipi_video_orise_720p_pt_init(void)
|
|||
pinfo.mipi.frame_rate = 55;
|
||||
pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
|
||||
pinfo.mipi.tx_eot_append = TRUE;
|
||||
pinfo.mipi.esc_byte_ratio = 4;
|
||||
|
||||
ret = mipi_orise_device_register(&pinfo, MIPI_DSI_PRIM,
|
||||
MIPI_DSI_PANEL_720P_PT);
|
||||
|
|
|
@ -86,6 +86,7 @@ static int __init mipi_video_toshiba_wsvga_pt_init(void)
|
|||
pinfo.mipi.data_lane2 = TRUE;
|
||||
pinfo.mipi.t_clk_post = 0x20;
|
||||
pinfo.mipi.t_clk_pre = 0x2d;
|
||||
pinfo.mipi.esc_byte_ratio = 4;
|
||||
pinfo.mipi.stream = 0; /* dma_p */
|
||||
pinfo.mipi.mdp_trigger = 0;
|
||||
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
|
||||
|
|
|
@ -85,6 +85,7 @@ static int __init mipi_video_toshiba_wuxga_init(void)
|
|||
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
|
||||
pinfo.mipi.frame_rate = 60;
|
||||
pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
|
||||
pinfo.mipi.esc_byte_ratio = 9;
|
||||
|
||||
ret = mipi_toshiba_device_register(&pinfo, MIPI_DSI_PRIM,
|
||||
MIPI_DSI_PANEL_WUXGA);
|
||||
|
|
|
@ -257,10 +257,10 @@ void mipi_dsi_phy_init(int panel_ndx, struct msm_panel_info const *panel_info,
|
|||
|
||||
MIPI_OUTP(MIPI_DSI_BASE + 0x128, 0x0001);/* start phy sw reset */
|
||||
wmb();
|
||||
usleep(10);
|
||||
usleep(1000);
|
||||
MIPI_OUTP(MIPI_DSI_BASE + 0x128, 0x0000);/* end phy w reset */
|
||||
wmb();
|
||||
usleep(10);
|
||||
usleep(1000);
|
||||
MIPI_OUTP(MIPI_DSI_BASE + 0x2cc, 0x0003);/* regulator_ctrl_0 */
|
||||
MIPI_OUTP(MIPI_DSI_BASE + 0x2d0, 0x0001);/* regulator_ctrl_1 */
|
||||
MIPI_OUTP(MIPI_DSI_BASE + 0x2d4, 0x0001);/* regulator_ctrl_2 */
|
||||
|
|
|
@ -661,8 +661,8 @@ void mipi_dsi_clk_enable(void)
|
|||
if (clk_set_rate(dsi_byte_div_clk, 1) < 0) /* divided by 1 */
|
||||
pr_err("%s: dsi_byte_div_clk - "
|
||||
"clk_set_rate failed\n", __func__);
|
||||
if (clk_set_rate(dsi_esc_clk, 2) < 0) /* divided by 2 */
|
||||
pr_err("%s: dsi_esc_clk - "
|
||||
if (clk_set_rate(dsi_esc_clk, esc_byte_ratio) < 0) /* divided by esc */
|
||||
pr_err("%s: dsi_esc_clk - " /* clk ratio */
|
||||
"clk_set_rate failed\n", __func__);
|
||||
mipi_dsi_pclk_ctrl(&dsi_pclk, 1);
|
||||
mipi_dsi_clk_ctrl(&dsicore_clk, 1);
|
||||
|
|
|
@ -129,6 +129,8 @@ struct mipi_panel_info {
|
|||
char mdp_trigger;
|
||||
char dma_trigger;
|
||||
uint32 dsi_pclk_rate;
|
||||
/* byte to esc clk ratio */
|
||||
uint32 esc_byte_ratio;
|
||||
/* The packet-size should not bet changed */
|
||||
char no_max_pkt_size;
|
||||
/* Clock required during LP commands */
|
||||
|
|
|
@ -56,7 +56,11 @@ void fat_msg(struct super_block *sb, const char *level, const char *fmt, ...)
|
|||
va_start(args, fmt);
|
||||
vaf.fmt = fmt;
|
||||
vaf.va = &args;
|
||||
printk("%sFAT-fs (%s): %pV\n", level, sb->s_id, &vaf);
|
||||
if (!strncmp(level, KERN_ERR, sizeof(KERN_ERR)))
|
||||
printk_ratelimited("%sFAT-fs (%s): %pV\n", level,
|
||||
sb->s_id, &vaf);
|
||||
else
|
||||
printk("%sFAT-fs (%s): %pV\n", level, sb->s_id, &vaf);
|
||||
va_end(args);
|
||||
}
|
||||
|
||||
|
|
|
@ -67,6 +67,9 @@ enum pm8xxx_vreg_pin_function {
|
|||
* @enable_time: time in us taken to enable a regulator to the maximum
|
||||
* allowed voltage for the system. This is dependent upon
|
||||
* the load and capacitance for a regulator on the board.
|
||||
* @slew_rate: worst case rate of change of regulator output voltage
|
||||
* in units of uV/us (V/s). This is dependent upon the
|
||||
* load and capacitance for a regulator on the board.
|
||||
* @ocp_enable: enable over current protection logic (available for
|
||||
* LVS and MVS type switches)
|
||||
* @ocp_enable_time: time in us to delay between enabling the switch and then
|
||||
|
@ -81,6 +84,7 @@ struct pm8xxx_regulator_platform_data {
|
|||
enum pm8xxx_vreg_pin_function pin_fn;
|
||||
int system_uA;
|
||||
int enable_time;
|
||||
int slew_rate;
|
||||
unsigned ocp_enable;
|
||||
int ocp_enable_time;
|
||||
};
|
||||
|
|
|
@ -344,6 +344,10 @@ struct hc_driver {
|
|||
*/
|
||||
int (*update_device)(struct usb_hcd *, struct usb_device *);
|
||||
int (*set_usb2_hw_lpm)(struct usb_hcd *, struct usb_device *, int);
|
||||
|
||||
/* to log completion events*/
|
||||
void (*log_urb_complete)(struct urb *urb, char * event,
|
||||
unsigned extra);
|
||||
};
|
||||
|
||||
extern int usb_hcd_link_urb_to_ep(struct usb_hcd *hcd, struct urb *urb);
|
||||
|
|
|
@ -399,7 +399,8 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_XVID v4l2_fourcc('X', 'V', 'I', 'D') /* Xvid */
|
||||
#define V4L2_PIX_FMT_VC1_ANNEX_G v4l2_fourcc('V', 'C', '1', 'G') /* SMPTE 421M Annex G compliant stream */
|
||||
#define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
|
||||
#define V4L2_PIX_FMT_DIVX_311 v4l2_fourcc('D', 'I', 'V', '3') /* DIVX */
|
||||
#define V4L2_PIX_FMT_DIVX_311 v4l2_fourcc('D', 'I', 'V', '3') /* DIVX311 */
|
||||
#define V4L2_PIX_FMT_DIVX v4l2_fourcc('D', 'I', 'V', 'X') /* DIVX */
|
||||
|
||||
/* Vendor-specific formats */
|
||||
#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
|
||||
|
|
|
@ -448,6 +448,9 @@ struct msm_camera_cfg_cmd {
|
|||
#define CMD_AXI_CFG_SEC 0xF4
|
||||
#define CMD_AXI_CFG_SEC_ALL_CHNLS 0xF8
|
||||
|
||||
#define CMD_AXI_START 0xE1
|
||||
#define CMD_AXI_STOP 0xE2
|
||||
|
||||
/* vfe config command: config command(from config thread)*/
|
||||
struct msm_vfe_cfg_cmd {
|
||||
int cmd_type;
|
||||
|
|
|
@ -502,8 +502,6 @@ power_attr(wake_unlock);
|
|||
#endif
|
||||
|
||||
static struct attribute *g[] = {
|
||||
&touch_event_attr.attr,
|
||||
&touch_event_timer_attr.attr,
|
||||
&state_attr.attr,
|
||||
#ifdef CONFIG_PM_TRACE
|
||||
&pm_trace_attr.attr,
|
||||
|
@ -512,6 +510,8 @@ static struct attribute *g[] = {
|
|||
#ifdef CONFIG_PM_SLEEP
|
||||
&pm_async_attr.attr,
|
||||
&wakeup_count_attr.attr,
|
||||
&touch_event_attr.attr,
|
||||
&touch_event_timer_attr.attr,
|
||||
#ifdef CONFIG_PM_DEBUG
|
||||
&pm_test_attr.attr,
|
||||
#endif
|
||||
|
|
|
@ -62,7 +62,7 @@ obj-$(CONFIG_SND_SOC_VOICE) += msm-pcm-voice.o msm-pcm-voip.o
|
|||
snd-soc-qdsp6-objs += msm-pcm-lpa.o msm-pcm-afe.o
|
||||
obj-$(CONFIG_SND_SOC_QDSP6) += snd-soc-qdsp6.o
|
||||
|
||||
snd-soc-msm8960-objs := msm8960.o apq8064.o msm8930.o
|
||||
snd-soc-msm8960-objs := msm8960.o apq8064.o msm8930.o mpq8064.o
|
||||
obj-$(CONFIG_SND_SOC_MSM8960) += snd-soc-msm8960.o
|
||||
|
||||
# Generic MSM drivers
|
||||
|
|
|
@ -44,6 +44,11 @@
|
|||
#define SITAR_MBHC_DEF_BUTTONS 8
|
||||
#define SITAR_MBHC_DEF_RLOADS 5
|
||||
|
||||
#define GPIO_AUX_PCM_DOUT 63
|
||||
#define GPIO_AUX_PCM_DIN 64
|
||||
#define GPIO_AUX_PCM_SYNC 65
|
||||
#define GPIO_AUX_PCM_CLK 66
|
||||
|
||||
static int msm8930_spk_control;
|
||||
static int msm8930_slim_0_rx_ch = 1;
|
||||
static int msm8930_slim_0_tx_ch = 1;
|
||||
|
@ -734,6 +739,80 @@ static int msm8930_btsco_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int msm8930_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd,
|
||||
struct snd_pcm_hw_params *params)
|
||||
{
|
||||
struct snd_interval *rate = hw_param_interval(params,
|
||||
SNDRV_PCM_HW_PARAM_RATE);
|
||||
|
||||
struct snd_interval *channels = hw_param_interval(params,
|
||||
SNDRV_PCM_HW_PARAM_CHANNELS);
|
||||
|
||||
/* PCM only supports mono output with 8khz sample rate */
|
||||
rate->min = rate->max = 8000;
|
||||
channels->min = channels->max = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int msm8930_aux_pcm_get_gpios(void)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
pr_debug("%s\n", __func__);
|
||||
|
||||
ret = gpio_request(GPIO_AUX_PCM_DOUT, "AUX PCM DOUT");
|
||||
if (ret < 0) {
|
||||
pr_err("%s: Failed to request gpio(%d): AUX PCM DOUT",
|
||||
__func__, GPIO_AUX_PCM_DOUT);
|
||||
|
||||
goto fail_dout;
|
||||
}
|
||||
|
||||
ret = gpio_request(GPIO_AUX_PCM_DIN, "AUX PCM DIN");
|
||||
if (ret < 0) {
|
||||
pr_err("%s: Failed to request gpio(%d): AUX PCM DIN",
|
||||
__func__, GPIO_AUX_PCM_DIN);
|
||||
goto fail_din;
|
||||
}
|
||||
|
||||
ret = gpio_request(GPIO_AUX_PCM_SYNC, "AUX PCM SYNC");
|
||||
if (ret < 0) {
|
||||
pr_err("%s: Failed to request gpio(%d): AUX PCM SYNC",
|
||||
__func__, GPIO_AUX_PCM_SYNC);
|
||||
goto fail_sync;
|
||||
}
|
||||
|
||||
ret = gpio_request(GPIO_AUX_PCM_CLK, "AUX PCM CLK");
|
||||
if (ret < 0) {
|
||||
pr_err("%s: Failed to request gpio(%d): AUX PCM CLK",
|
||||
__func__, GPIO_AUX_PCM_CLK);
|
||||
goto fail_clk;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
fail_clk:
|
||||
gpio_free(GPIO_AUX_PCM_SYNC);
|
||||
fail_sync:
|
||||
gpio_free(GPIO_AUX_PCM_DIN);
|
||||
fail_din:
|
||||
gpio_free(GPIO_AUX_PCM_DOUT);
|
||||
fail_dout:
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int msm8930_aux_pcm_free_gpios(void)
|
||||
{
|
||||
gpio_free(GPIO_AUX_PCM_DIN);
|
||||
gpio_free(GPIO_AUX_PCM_DOUT);
|
||||
gpio_free(GPIO_AUX_PCM_SYNC);
|
||||
gpio_free(GPIO_AUX_PCM_CLK);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int msm8930_startup(struct snd_pcm_substream *substream)
|
||||
{
|
||||
pr_debug("%s(): substream = %s stream = %d\n", __func__,
|
||||
|
@ -741,6 +820,26 @@ static int msm8930_startup(struct snd_pcm_substream *substream)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int msm8930_auxpcm_startup(struct snd_pcm_substream *substream)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
pr_debug("%s(): substream = %s\n", __func__, substream->name);
|
||||
ret = msm8930_aux_pcm_get_gpios();
|
||||
if (ret < 0) {
|
||||
pr_err("%s: Aux PCM GPIO request failed\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
static void msm8930_auxpcm_shutdown(struct snd_pcm_substream *substream)
|
||||
{
|
||||
pr_debug("%s(): substream = %s\n", __func__, substream->name);
|
||||
msm8930_aux_pcm_free_gpios();
|
||||
}
|
||||
|
||||
static void msm8930_shutdown(struct snd_pcm_substream *substream)
|
||||
{
|
||||
pr_debug("%s(): substream = %s stream = %d\n", __func__,
|
||||
|
@ -753,6 +852,11 @@ static struct snd_soc_ops msm8930_be_ops = {
|
|||
.shutdown = msm8930_shutdown,
|
||||
};
|
||||
|
||||
static struct snd_soc_ops msm8930_auxpcm_be_ops = {
|
||||
.startup = msm8930_auxpcm_startup,
|
||||
.shutdown = msm8930_auxpcm_shutdown,
|
||||
};
|
||||
|
||||
/* Digital audio interface glue - connects codec <---> CPU */
|
||||
static struct snd_soc_dai_link msm8930_dai[] = {
|
||||
/* FrontEnd DAI Links */
|
||||
|
@ -1019,6 +1123,30 @@ static struct snd_soc_dai_link msm8930_dai[] = {
|
|||
.no_pcm = 1,
|
||||
.be_id = MSM_BACKEND_DAI_AFE_PCM_TX,
|
||||
},
|
||||
/* AUX PCM Backend DAI Links */
|
||||
{
|
||||
.name = LPASS_BE_AUXPCM_RX,
|
||||
.stream_name = "AUX PCM Playback",
|
||||
.cpu_dai_name = "msm-dai-q6.2",
|
||||
.platform_name = "msm-pcm-routing",
|
||||
.codec_name = "msm-stub-codec.1",
|
||||
.codec_dai_name = "msm-stub-rx",
|
||||
.no_pcm = 1,
|
||||
.be_id = MSM_BACKEND_DAI_AUXPCM_RX,
|
||||
.be_hw_params_fixup = msm8930_auxpcm_be_params_fixup,
|
||||
.ops = &msm8930_auxpcm_be_ops,
|
||||
},
|
||||
{
|
||||
.name = LPASS_BE_AUXPCM_TX,
|
||||
.stream_name = "AUX PCM Capture",
|
||||
.cpu_dai_name = "msm-dai-q6.3",
|
||||
.platform_name = "msm-pcm-routing",
|
||||
.codec_name = "msm-stub-codec.1",
|
||||
.codec_dai_name = "msm-stub-tx",
|
||||
.no_pcm = 1,
|
||||
.be_id = MSM_BACKEND_DAI_AUXPCM_TX,
|
||||
.be_hw_params_fixup = msm8930_auxpcm_be_params_fixup,
|
||||
},
|
||||
/* Incall Music BACK END DAI Link */
|
||||
{
|
||||
.name = LPASS_BE_VOICE_PLAYBACK_TX,
|
||||
|
|
Loading…
Reference in New Issue