Merge branch 'cm-11.0' into stable/cm-11.0
This commit is contained in:
commit
e75a236bc1
|
@ -375,8 +375,6 @@ static int get_system_rev(void)
|
|||
static void cam_ldo_power_on(void)
|
||||
{
|
||||
int ret = 0;
|
||||
int cam_type = 0;
|
||||
|
||||
printk(KERN_DEBUG "[JC] %s: In\n", __func__);
|
||||
|
||||
printk(KERN_DEBUG "[JC] %s: system_rev=%d\n", __func__, system_rev);
|
||||
|
@ -421,22 +419,9 @@ static void cam_ldo_power_on(void)
|
|||
__func__);
|
||||
}
|
||||
|
||||
cam_type = gpio_get_value(GPIO_CAM_SENSOR_DET);
|
||||
|
||||
printk(KERN_DEBUG "[JC] %s: SENSOR TYPE = %d\n", __func__, cam_type);
|
||||
|
||||
/* CAM_DVDD1.1V_1.2V*/
|
||||
l28 = regulator_get(NULL, "8921_l28");
|
||||
|
||||
if (cam_type == 1) {
|
||||
printk(KERN_DEBUG "[JC] %s: Sony Sensor 1.1V", __func__);
|
||||
regulator_set_voltage(l28, 1100000, 1100000);
|
||||
}
|
||||
else {
|
||||
printk(KERN_DEBUG "[JC] %s: LSI Sensor 1.2V", __func__);
|
||||
regulator_set_voltage(l28, 1200000, 1200000);
|
||||
}
|
||||
|
||||
regulator_set_voltage(l28, 1100000, 1100000);
|
||||
ret = regulator_enable(l28);
|
||||
if (ret)
|
||||
printk(KERN_DEBUG "error enabling regulator 8921_l28\n");
|
||||
|
@ -1549,17 +1534,6 @@ struct pm_gpio cam_init_in_cfg = {
|
|||
.output_value = 0,
|
||||
};
|
||||
|
||||
struct pm_gpio cam_rear_det = {
|
||||
.direction = PM_GPIO_DIR_IN,
|
||||
.pull = PM_GPIO_PULL_NO,
|
||||
.out_strength = PM_GPIO_STRENGTH_LOW,
|
||||
.function = PM_GPIO_FUNC_NORMAL,
|
||||
.inv_int_pol = 0,
|
||||
.vin_sel = PM_GPIO_VIN_S4,
|
||||
.output_buffer = PM_GPIO_OUT_BUF_CMOS,
|
||||
.output_value = 0,
|
||||
};
|
||||
|
||||
void __init apq8064_init_cam(void)
|
||||
{
|
||||
printk(KERN_DEBUG "[JC] %s: In\n", __func__);
|
||||
|
@ -1579,7 +1553,6 @@ void __init apq8064_init_cam(void)
|
|||
#endif
|
||||
|
||||
pm8xxx_gpio_config(GPIO_CAM_A_EN2, &cam_init_out_cfg);
|
||||
pm8xxx_gpio_config(GPIO_CAM_SENSOR_DET, &cam_rear_det);
|
||||
|
||||
/* temp: need to set low because bootloader make high signal. */
|
||||
pmic_gpio_ctrl(GPIO_CAM_VT_EN, 0);
|
||||
|
|
|
@ -51,13 +51,6 @@ void *wlan_static_scan_buf0;
|
|||
void *wlan_static_scan_buf1;
|
||||
void *wlan_static_dhd_info_buf;
|
||||
|
||||
#define ENABLE_4335BT_WAR
|
||||
|
||||
#ifdef ENABLE_4335BT_WAR
|
||||
static int bt_off = 0;
|
||||
extern int bt_is_running;
|
||||
#endif /* ENABLE_4335BT_WAR */
|
||||
|
||||
static void *brcm_wlan_mem_prealloc(int section, unsigned long size)
|
||||
{
|
||||
if (section == PREALLOC_WLAN_SEC_NUM)
|
||||
|
@ -206,30 +199,13 @@ int __init brcm_wifi_init_gpio(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef ENABLE_4335BT_WAR
|
||||
static int brcm_wlan_power(int onoff,bool b0rev)
|
||||
#else
|
||||
static int brcm_wlan_power(int onoff)
|
||||
#endif
|
||||
{
|
||||
printk(KERN_INFO"------------------------------------------------");
|
||||
printk(KERN_INFO"------------------------------------------------\n");
|
||||
printk(KERN_INFO"%s Enter: power %s\n", __func__, onoff ? "on" : "off");
|
||||
|
||||
if (onoff) {
|
||||
#ifdef ENABLE_4335BT_WAR
|
||||
if(b0rev == true && ice_gpiox_get(FPGA_GPIO_BT_EN) == 0)
|
||||
{
|
||||
bt_off = 1;
|
||||
ice_gpiox_set(FPGA_GPIO_BT_EN, 1);
|
||||
printk("[brcm_wlan_power] Bluetooth Power On.\n");
|
||||
msleep(50);
|
||||
}
|
||||
else {
|
||||
bt_off = 0;
|
||||
}
|
||||
#endif /* ENABLE_4335BT_WAR */
|
||||
|
||||
/*
|
||||
if (gpio_request(GPIO_WL_REG_ON, "WL_REG_ON"))
|
||||
{
|
||||
|
@ -255,13 +231,6 @@ static int brcm_wlan_power(int onoff)
|
|||
return -EIO;
|
||||
}
|
||||
}
|
||||
#ifdef ENABLE_4335BT_WAR
|
||||
if(onoff && (bt_off == 1) && (bt_is_running == 0)) {
|
||||
msleep(100);
|
||||
ice_gpiox_set(FPGA_GPIO_BT_EN, 0);
|
||||
printk("[brcm_wlan_power] BT_REG_OFF.\n");
|
||||
}
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -312,7 +281,6 @@ static int brcm_wlan_set_carddetect(int val)
|
|||
|
||||
/* msleep(200); wait for carddetect */
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -60,8 +60,6 @@
|
|||
#define GPIO_BT_UART_TXD BT_UART_TXD
|
||||
#define GPIO_BT_HOST_WAKE BT_HOST_WAKE
|
||||
|
||||
int bt_is_running=0;
|
||||
EXPORT_SYMBOL(bt_is_running);
|
||||
|
||||
static struct rfkill *bt_rfkill;
|
||||
|
||||
|
@ -176,8 +174,6 @@ static int bcm4335_bt_rfkill_set_power(void *data, bool blocked)
|
|||
ret = ice_gpiox_set(FPGA_GPIO_BT_EN, 1);
|
||||
if (ret)
|
||||
pr_err("[BT] failed to set BT_EN.\n");
|
||||
else
|
||||
bt_is_running = 1;
|
||||
} else {
|
||||
#ifdef BT_UART_CFG
|
||||
for (pin = 0; pin < ARRAY_SIZE(bt_uart_off_table); pin++) {
|
||||
|
@ -193,8 +189,6 @@ static int bcm4335_bt_rfkill_set_power(void *data, bool blocked)
|
|||
ret = ice_gpiox_set(FPGA_GPIO_BT_EN, 0);
|
||||
if (ret)
|
||||
pr_err("[BT] failed to set BT_EN.\n");
|
||||
else
|
||||
bt_is_running = 0;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
@ -232,7 +226,6 @@ static int bcm4335_bluetooth_probe(struct platform_device *pdev)
|
|||
int pin = 0;
|
||||
#endif
|
||||
|
||||
bt_is_running = 0;
|
||||
/* temporailiy set HOST_WAKE OUT direction until FPGA work finishs */
|
||||
/* if setting HOST_WAKE to NO PULL, BT would not be turned on. */
|
||||
/* By guideline of BRCM, it is needed to determine pull status */
|
||||
|
|
|
@ -96,7 +96,6 @@ static void bluesleep_ext_wake_set_wq(struct work_struct *work);
|
|||
static void bluesleep_sleep_wakeup_wq(struct work_struct *work);
|
||||
static void bluesleep_start_wq(struct work_struct *work);
|
||||
static void bluesleep_stop_wq(struct work_struct *work);
|
||||
static void bluesleep_abnormal_stop_wq(struct work_struct *work);
|
||||
|
||||
|
||||
/* work queue */
|
||||
|
@ -105,7 +104,6 @@ DECLARE_DELAYED_WORK(tx_timer_expired_workqueue, bluesleep_ext_wake_set_wq);
|
|||
DECLARE_DELAYED_WORK(tx_data_wakeup_workqueue, bluesleep_sleep_wakeup_wq);
|
||||
DECLARE_DELAYED_WORK(bluesleep_start_workqueue, bluesleep_start_wq);
|
||||
DECLARE_DELAYED_WORK(bluesleep_stop_workqueue, bluesleep_stop_wq);
|
||||
DECLARE_DELAYED_WORK(bluesleep_abnormal_stop_workqueue, bluesleep_abnormal_stop_wq);
|
||||
|
||||
|
||||
/* Macros for handling sleep work */
|
||||
|
@ -119,7 +117,6 @@ DECLARE_DELAYED_WORK(bluesleep_abnormal_stop_workqueue, bluesleep_abnormal_stop_
|
|||
|
||||
#define bluesleep_start() schedule_delayed_work(&bluesleep_start_workqueue, 0)
|
||||
#define bluesleep_stop() schedule_delayed_work(&bluesleep_stop_workqueue, 0)
|
||||
#define bluesleep_abnormal_stop() schedule_delayed_work(&bluesleep_abnormal_stop_workqueue, 0)
|
||||
|
||||
|
||||
/* 10 second timeout */
|
||||
|
@ -370,7 +367,7 @@ static int bluesleep_read_proc_lpm(char *page, char **start, off_t offset,
|
|||
int count, int *eof, void *data)
|
||||
{
|
||||
*eof = 1;
|
||||
return snprintf(page, count, "lpm: %u\n", has_lpm_enabled?1:0 );
|
||||
return snprintf(page, count, "unsupported to read\n");
|
||||
}
|
||||
|
||||
static int bluesleep_write_proc_lpm(struct file *file, const char *buffer,
|
||||
|
@ -390,7 +387,7 @@ static int bluesleep_write_proc_lpm(struct file *file, const char *buffer,
|
|||
bluesleep_stop();
|
||||
has_lpm_enabled = false;
|
||||
//bsi->uport = NULL;
|
||||
} else if (b == '1') {
|
||||
} else {
|
||||
BT_ERR("(bluesleep_write_proc_lpm) Reg HCI notifier.");
|
||||
/* HCI_DEV_REG */
|
||||
if (!has_lpm_enabled) {
|
||||
|
@ -399,12 +396,6 @@ static int bluesleep_write_proc_lpm(struct file *file, const char *buffer,
|
|||
/* if bluetooth started, start bluesleep*/
|
||||
bluesleep_start();
|
||||
}
|
||||
} else if (b == '2') {
|
||||
BT_ERR("(bluesleep_write_proc_lpm) don`t control ext_wake & uart clk");
|
||||
if(has_lpm_enabled) {
|
||||
has_lpm_enabled = false;
|
||||
bluesleep_abnormal_stop();
|
||||
}
|
||||
}
|
||||
|
||||
return count;
|
||||
|
@ -597,42 +588,6 @@ static void bluesleep_stop_wq(struct work_struct *work)
|
|||
|
||||
bsi->uport = NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* Stops the Sleep-Mode Protocol on the Host when abnormal.
|
||||
*/
|
||||
static void bluesleep_abnormal_stop_wq(struct work_struct *work)
|
||||
{
|
||||
int ret;
|
||||
|
||||
BT_ERR("bluesleep_abnormal_stop_wq");
|
||||
|
||||
/* assert BT_WAKE */
|
||||
if (bsi->has_ext_wake == 1) {
|
||||
ret = ice_gpiox_set(bsi->ext_wake, 1);
|
||||
if (ret)
|
||||
BT_ERR("(bluesleep_abnormal_stop_wq) failed to set ext_wake 1.");
|
||||
}
|
||||
set_bit(BT_EXT_WAKE, &flags);
|
||||
del_timer(&tx_timer);
|
||||
clear_bit(BT_PROTO, &flags);
|
||||
|
||||
if (test_bit(BT_ASLEEP, &flags)) {
|
||||
clear_bit(BT_ASLEEP, &flags);
|
||||
hsuart_power(1);
|
||||
}
|
||||
|
||||
atomic_inc(&open_count);
|
||||
|
||||
#if BT_ENABLE_IRQ_WAKE
|
||||
if (disable_irq_wake(bsi->host_wake_irq))
|
||||
BT_ERR("Couldn't disable hostwake IRQ wakeup mode\n");
|
||||
#endif
|
||||
wake_lock_timeout(&bsi->wake_lock, HZ / 2);
|
||||
|
||||
bsi->uport = NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* Read the <code>BT_WAKE</code> GPIO pin value via the proc interface.
|
||||
* When this function returns, <code>page</code> will contain a 1 if the
|
||||
|
|
|
@ -218,7 +218,7 @@ int msm_jpeg_evt_get(struct msm_jpeg_device *pgmn_dev,
|
|||
JPEG_DBG("%s:%d] no buffer\n", __func__, __LINE__);
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
memset(&ctrl_cmd, 0, sizeof(ctrl_cmd));
|
||||
ctrl_cmd.type = buf_p->vbuf.type;
|
||||
kfree(buf_p);
|
||||
|
||||
|
|
|
@ -196,6 +196,7 @@ int msm_mercury_evt_get(struct msm_mercury_device *pmercury_dev,
|
|||
int rc = 0;
|
||||
|
||||
MCR_DBG("(%d)%s() Enter\n", __LINE__, __func__);
|
||||
memset(&ctrl_cmd, 0, sizeof(ctrl_cmd));
|
||||
ctrl_cmd.type = (uint32_t)msm_mercury_q_wait(&pmercury_dev->evt_q);
|
||||
|
||||
rc = copy_to_user(arg, &ctrl_cmd, sizeof(ctrl_cmd));
|
||||
|
|
|
@ -827,7 +827,7 @@ static long msm_camera_v4l2_private_ioctl(struct file *file, void *fh,
|
|||
mutex_unlock(&pcam->event_lock);
|
||||
break;
|
||||
}
|
||||
if (ioctl_ptr->len > 0) {
|
||||
if (ioctl_ptr->len > 0 && ioctl_ptr->len <= MAX_SERVER_PAYLOAD_LENGTH) {
|
||||
if (copy_to_user(ioctl_ptr->ioctl_ptr, payload,
|
||||
ioctl_ptr->len)) {
|
||||
pr_err("%s Copy to user failed for cmd %d",
|
||||
|
|
|
@ -1021,14 +1021,13 @@ static int __msm_mctl_map_user_frame(struct msm_cam_meta_frame *meta_frame,
|
|||
static int __msm_mctl_unmap_user_frame(struct msm_cam_meta_frame *meta_frame,
|
||||
struct ion_client *client, int domain_num)
|
||||
{
|
||||
int i = 0;
|
||||
int i = 0, rc = 0;
|
||||
|
||||
for (i = 0; i < meta_frame->frame.num_planes; i++) {
|
||||
D("%s Plane %d handle %p", __func__, i,
|
||||
meta_frame->map[i].handle);
|
||||
put_pmem_file(meta_frame->map[i].file);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Map using PMEM APIs */
|
||||
|
@ -1039,7 +1038,7 @@ static int __msm_mctl_map_user_frame(struct msm_cam_meta_frame *meta_frame,
|
|||
unsigned long paddr = 0;
|
||||
struct file *file = NULL;
|
||||
unsigned long len;
|
||||
int i = 0, j = 0, rc=0;
|
||||
int i = 0, j = 0;
|
||||
|
||||
for (i = 0; i < meta_frame->frame.num_planes; i++) {
|
||||
rc = get_pmem_file(meta_frame->frame.mp[i].fd,
|
||||
|
@ -1052,7 +1051,7 @@ static int __msm_mctl_map_user_frame(struct msm_cam_meta_frame *meta_frame,
|
|||
if (meta_frame->map[j].file)
|
||||
put_pmem_file(meta_frame->map[j].file);
|
||||
|
||||
return rc;
|
||||
return -EACCES;
|
||||
}
|
||||
D("%s Got pmem file for fd %d plane %d as %p", __func__,
|
||||
meta_frame->frame.mp[i].fd, i, file);
|
||||
|
|
|
@ -147,6 +147,8 @@ struct jc_ctrl_t {
|
|||
bool samsung_app;
|
||||
bool factory_bin;
|
||||
int fw_retry_cnt;
|
||||
int fps_mode;
|
||||
int max_fps;
|
||||
};
|
||||
|
||||
static struct jc_ctrl_t *jc_ctrl;
|
||||
|
@ -1992,7 +1994,6 @@ static int jc_set_snapshot_mode(int mode)
|
|||
jc_writeb(JC_CATEGORY_CAPCTRL,
|
||||
JC_CAPCTRL_START_DUALCAP, 0x07);
|
||||
} else {
|
||||
usleep(10*1000);
|
||||
jc_writeb(JC_CATEGORY_CAPCTRL,
|
||||
JC_CAPCTRL_START_DUALCAP, 0x01);
|
||||
}
|
||||
|
@ -2046,7 +2047,7 @@ static int jc_set_af_mode(int status)
|
|||
|
||||
cam_info("Entered, af mode %d\n", status);
|
||||
|
||||
if (status < 1 || status > 6) {
|
||||
if (status < 1 || status > 7) {
|
||||
cam_err("invalid value, %d\n", status);
|
||||
return rc;
|
||||
}
|
||||
|
@ -2105,6 +2106,10 @@ static int jc_set_af_mode(int status)
|
|||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x02, 0x01);
|
||||
}
|
||||
} else if (status == 7) {
|
||||
cam_info("Infinity\n");
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x02, 0x02);
|
||||
}
|
||||
|
||||
return rc;
|
||||
|
@ -2445,14 +2450,15 @@ static int jc_set_movie_mode(int mode)
|
|||
jc_ctrl->movie_mode = false;
|
||||
jc_writeb(JC_CATEGORY_PARM,
|
||||
JC_PARM_MON_MOVIE_SELECT, 0x00);
|
||||
|
||||
cam_info("Zsl mode\n");
|
||||
jc_writeb(0x02, 0xCF, 0x01); /*zsl mode*/
|
||||
jc_writeb(0x02, 0xCF, 0x01); /*zsl mode*/
|
||||
} else if (mode == 1) {
|
||||
cam_info("Movie mode\n");
|
||||
jc_ctrl->movie_mode = true;
|
||||
jc_writeb(JC_CATEGORY_PARM,
|
||||
JC_PARM_MON_MOVIE_SELECT, 0x01);
|
||||
cam_info("Non zsl mode\n");
|
||||
jc_writeb(0x02, 0xCF, 0x00); /*non-zsl mode*/
|
||||
}
|
||||
return rc;
|
||||
}
|
||||
|
@ -2526,6 +2532,178 @@ static int jc_set_shot_mode(int mode)
|
|||
return rc;
|
||||
}
|
||||
|
||||
static int jc_set_fps(int mode, int min, int max)
|
||||
{
|
||||
int32_t rc = 0;
|
||||
|
||||
cam_info("Entered, fps mode : %d, min : %d, max : %d\n",
|
||||
mode, min, max);
|
||||
|
||||
jc_ctrl->fps_mode = mode;
|
||||
jc_ctrl->max_fps = max;
|
||||
|
||||
if (mode == 0) {
|
||||
cam_info("Auto fps mode\n");
|
||||
jc_writeb(0x02, 0xCF, 0x01); /*zsl mode*/
|
||||
|
||||
if (min == 10000 && max == 30000) { /*LLS*/
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x15);
|
||||
} else if (max == 24000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x0C);
|
||||
} else {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x00);
|
||||
}
|
||||
} else if (mode == 1) {
|
||||
cam_info("Fixed fps mode\n");
|
||||
jc_writeb(0x02, 0xCF, 0x00); /*non-zsl mode*/
|
||||
|
||||
if (max == 7000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x09);
|
||||
} else if (max == 15000) {
|
||||
if (jc_ctrl->shot_mode == 0x0F) {/*CinePic*/
|
||||
cam_info("CinePic FPS\n");
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x17);
|
||||
} else {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x04);
|
||||
}
|
||||
} else if (max == 24000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x05);
|
||||
} else if (max == 30000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x02);
|
||||
} else if (max == 60000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x07);
|
||||
} else if (max == 90000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x0B);
|
||||
} else if (max == 120) { /*120fps*/
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x08);
|
||||
}
|
||||
} else if (mode == 2) {
|
||||
cam_info("Drama shot mode\n");
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x16);
|
||||
}
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int jc_set_scene_mode(int mode)
|
||||
{
|
||||
int32_t rc = 0;
|
||||
u32 isp_mode;
|
||||
|
||||
jc_readb(JC_CATEGORY_SYS, JC_SYS_MODE, &isp_mode);
|
||||
|
||||
cam_info("Entered, scene mode %d / %d\n", mode, isp_mode);
|
||||
cam_info("fps info %d / %d\n", jc_ctrl->fps_mode, jc_ctrl->max_fps);
|
||||
|
||||
if (isp_mode == JC_MONITOR_MODE) {
|
||||
cam_info("monitor mode\n");
|
||||
|
||||
jc_set_mode(JC_PARMSET_MODE);
|
||||
|
||||
if (mode == 0) {
|
||||
cam_info("auto scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x01);
|
||||
jc_set_fps(jc_ctrl->fps_mode, 0, jc_ctrl->max_fps);
|
||||
} else if (mode == 5) {
|
||||
cam_info("party scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x15);
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x20);
|
||||
} else if (mode == 7) {
|
||||
cam_info("sunset scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x16);
|
||||
jc_set_fps(jc_ctrl->fps_mode, 0, jc_ctrl->max_fps);
|
||||
} else if (mode == 10) {
|
||||
cam_info("night scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x17);
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x21);
|
||||
} else if (mode == 20) {
|
||||
cam_info("action scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x11);
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x11);
|
||||
} else {
|
||||
cam_info("etc scene\n");
|
||||
jc_set_fps(jc_ctrl->fps_mode, 0, jc_ctrl->max_fps);
|
||||
}
|
||||
|
||||
jc_set_mode(JC_MONITOR_MODE);
|
||||
|
||||
cam_info("Restart auto focus\n");
|
||||
if (jc_ctrl->af_mode == 3) {
|
||||
cam_info("start CAF\n");
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x01, 0x03);
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x02, 0x01);
|
||||
} else if (jc_ctrl->af_mode == 4) {
|
||||
cam_info("start macro CAF\n");
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x01, 0x07);
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x02, 0x01);
|
||||
} else if (jc_ctrl->af_mode == 5) {
|
||||
msleep(50);
|
||||
cam_info("start Movie CAF\n");
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x01, 0x04);
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x02, 0x01);
|
||||
} else if (jc_ctrl->af_mode == 6) {
|
||||
msleep(50);
|
||||
cam_info("FD CAF\n");
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x01, 0x05);
|
||||
jc_writeb(JC_CATEGORY_LENS,
|
||||
0x02, 0x01);
|
||||
}
|
||||
} else {
|
||||
cam_info("parameter mode\n");
|
||||
|
||||
if (mode == 0) {
|
||||
cam_info("auto scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x01);
|
||||
jc_set_fps(jc_ctrl->fps_mode, 0, jc_ctrl->max_fps);
|
||||
} else if (mode == 5) {
|
||||
cam_info("party scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x15);
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x20);
|
||||
} else if (mode == 7) {
|
||||
cam_info("sunset scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x16);
|
||||
jc_set_fps(jc_ctrl->fps_mode, 0, jc_ctrl->max_fps);
|
||||
} else if (mode == 10) {
|
||||
cam_info("night scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x17);
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x21);
|
||||
} else if (mode == 20) {
|
||||
cam_info("action scene\n");
|
||||
jc_writeb(JC_CATEGORY_PARM, 0x0E, 0x11);
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x11);
|
||||
} else {
|
||||
cam_info("etc scene\n");
|
||||
jc_set_fps(jc_ctrl->fps_mode, 0, jc_ctrl->max_fps);
|
||||
}
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int jc_set_ocr_focus_mode(int mode)
|
||||
{
|
||||
int32_t rc = 0;
|
||||
|
@ -2587,67 +2765,6 @@ static int jc_set_softlanding(void)
|
|||
return rc;
|
||||
}
|
||||
|
||||
static int jc_set_fps(int mode, int min, int max)
|
||||
{
|
||||
int32_t rc = 0;
|
||||
|
||||
cam_info("Entered, fps mode : %d, min : %d, max : %d\n",
|
||||
mode, min, max);
|
||||
|
||||
if (mode == 0) {
|
||||
cam_info("Auto fps mode\n");
|
||||
jc_writeb(0x02, 0xCF, 0x01); /*zsl mode*/
|
||||
|
||||
if (min == 10000 && max == 30000) { /*LLS*/
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x15);
|
||||
} else if (max == 24000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x0C);
|
||||
} else {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x00);
|
||||
}
|
||||
} else if (mode == 1) {
|
||||
cam_info("Fixed fps mode\n");
|
||||
jc_writeb(0x02, 0xCF, 0x00); /*non-zsl mode*/
|
||||
|
||||
if (max == 7000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x09);
|
||||
} else if (max == 15000) {
|
||||
if (jc_ctrl->shot_mode == 0x0F) {/*CinePic*/
|
||||
cam_info("CinePic FPS\n");
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x17);
|
||||
} else {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x04);
|
||||
}
|
||||
} else if (max == 24000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x05);
|
||||
} else if (max == 30000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x02);
|
||||
} else if (max == 60000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x07);
|
||||
} else if (max == 90000) {
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x0B);
|
||||
} else if (max == 120) { /*120fps*/
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x08);
|
||||
}
|
||||
} else if (mode == 2) {
|
||||
cam_info("Drama shot mode\n");
|
||||
jc_writeb(JC_CATEGORY_AE,
|
||||
JC_AE_EP_MODE_CAP, 0x16);
|
||||
}
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int jc_set_flash(int mode, int mode2)
|
||||
{
|
||||
int32_t rc = 0;
|
||||
|
@ -2962,14 +3079,8 @@ void sensor_native_control(void __user *arg)
|
|||
jc_ctrl->factory_bin = false;
|
||||
break;
|
||||
|
||||
case EXT_CAM_START_GOLF_SHOT:
|
||||
cam_info("Golf shot start, 1/1000 shutter speed");
|
||||
jc_writeb(0x03, 0x0B, 0x18);
|
||||
break;
|
||||
|
||||
case EXT_CAM_STOP_GOLF_SHOT:
|
||||
cam_info("Golf shot stop, return normal shutter speed");
|
||||
jc_writeb(0x03, 0x0B, 0x08);
|
||||
case EXT_CAM_SCENEMODE:
|
||||
jc_set_scene_mode(ctrl_info.value_1);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -3116,6 +3227,8 @@ static int jc_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl)
|
|||
jc_ctrl->isp_null_read_sensor_fw = false;
|
||||
jc_ctrl->touch_af_mode = false;
|
||||
jc_ctrl->fw_retry_cnt = 0;
|
||||
jc_ctrl->fps_mode = 0;
|
||||
jc_ctrl->max_fps = 0;
|
||||
|
||||
rc = msm_camera_request_gpio_table(data, 1);
|
||||
if (rc < 0)
|
||||
|
@ -3169,7 +3282,8 @@ static int jc_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl)
|
|||
|
||||
cam_info("isp_ret: %d, samsung app: %d, factory bin: %d\n",
|
||||
isp_ret, jc_ctrl->samsung_app, jc_ctrl->factory_bin);
|
||||
#if 0
|
||||
|
||||
#if 0 //remove for ged
|
||||
if (isp_ret == 0 && jc_ctrl->samsung_app == false && jc_ctrl->factory_bin == false) {
|
||||
cam_err("3rd party app. skip ISP FW update\n");
|
||||
goto start;
|
||||
|
@ -3262,12 +3376,17 @@ static int jc_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl)
|
|||
return -ENOSYS;
|
||||
}
|
||||
}
|
||||
|
||||
//start:
|
||||
#if 0 //remove for ged
|
||||
start:
|
||||
#endif
|
||||
cam_info("nv12 output setting\n");
|
||||
err = jc_writeb(JC_CATEGORY_CAPCTRL,
|
||||
0x0, 0x0f);
|
||||
|
||||
cam_info("GED camera setting\n");
|
||||
err = jc_writeb(JC_CATEGORY_PARM,
|
||||
0xf, 0x01);
|
||||
|
||||
if (jc_ctrl->samsung_app != 1) {
|
||||
cam_info("Set different ratio capture mode\n");
|
||||
jc_set_different_ratio_capture(1);
|
||||
|
@ -3308,8 +3427,6 @@ static int jc_sensor_power_down(struct msm_sensor_ctrl_t *s_ctrl)
|
|||
/* AF off */
|
||||
data->sensor_platform_info->sensor_af_power_off();
|
||||
|
||||
usleep(10*1000); /* Add 1ms delay for off timing */
|
||||
|
||||
/* MCLK */
|
||||
rc = msm_cam_clk_enable(&s_ctrl->sensor_i2c_client->client->dev,
|
||||
cam_clk_info, s_ctrl->cam_clk, ARRAY_SIZE(cam_clk_info), 0);
|
||||
|
|
|
@ -18,15 +18,15 @@
|
|||
#define PLATFORM_DRIVER_NAME "msm_camera_s5k6b2yx"
|
||||
#define s5k6b2yx_obj s5k6b2yx_##obj
|
||||
|
||||
#define VISION_MODE_TEST_PATTERN 0
|
||||
#define VISION_MODE_TEST_PATTERN 0
|
||||
|
||||
#define VISION_MODE_AE_REG_ADDR 0x600a
|
||||
#define VISION_MODE_AE_BACKLIGHT 0x9a
|
||||
#define VISION_MODE_AE_BACKLIGHT 0x7a
|
||||
#define VISION_MODE_AE_NORMAL 0x2a
|
||||
|
||||
#define VISION_MODE_SET_FPS_ADDR 0x6027
|
||||
#define VISION_MODE_SET_FPS_5 0x1
|
||||
#define VISION_MODE_SET_FPS_10 0X2
|
||||
#define VISION_MODE_SET_FPS_10 0X2
|
||||
#define VISION_MODE_FPS_5_VAL 0xD0
|
||||
#define VISION_MODE_FPS_10_VAL 0x68
|
||||
|
||||
|
@ -48,11 +48,8 @@ static struct msm_camera_i2c_reg_conf s5k6b2yx_vision_settings[] = {
|
|||
{0x6026, 0x00}, /* 5fps */
|
||||
// {0x6027, 0xD0}, /* 5fps */
|
||||
/* number of pixel : 176*104*24/64=6864 */
|
||||
{0x5030, 0x11},
|
||||
{0x5031, 0xE0},
|
||||
/* AE max shutter */
|
||||
{0x5014, 0x11},
|
||||
{0x5015, 0x00},
|
||||
{0x5030, 0x1A},
|
||||
{0x5031, 0xD0},
|
||||
/* 8bit mode */
|
||||
{0x7030, 0x0E},
|
||||
{0x7031, 0x2F},
|
||||
|
@ -69,14 +66,14 @@ static struct msm_camera_i2c_reg_conf s5k6b2yx_vision_settings[] = {
|
|||
{0x7433, 0x32},
|
||||
{0x7075, 0x3D},
|
||||
{0x7066, 0x09},
|
||||
{0x6000, 0x11},
|
||||
{0x6001, 0x11},
|
||||
{0x6002, 0x11},
|
||||
{0x6003, 0x11},
|
||||
{0x6004, 0x11},
|
||||
{0x6005, 0x11},
|
||||
{0x6006, 0x11},
|
||||
{0x6007, 0x11},
|
||||
{0x6000, 0x01},
|
||||
{0x6001, 0x10},
|
||||
{0x6002, 0x14},
|
||||
{0x6003, 0x41},
|
||||
{0x6004, 0x14},
|
||||
{0x6005, 0x41},
|
||||
{0x6006, 0x01},
|
||||
{0x6007, 0x10},
|
||||
/* Target */
|
||||
{0x600A, 0x2A},
|
||||
/* Speed */
|
||||
|
@ -688,7 +685,6 @@ int s5k6b2yx_sensor_set_vision_ae_control(
|
|||
}
|
||||
return 0;
|
||||
}
|
||||
#if !defined(CONFIG_MACH_MELIUS)
|
||||
|
||||
static ssize_t s5k6b2yx_camera_type_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
|
@ -701,19 +697,14 @@ static ssize_t s5k6b2yx_camera_fw_show(struct device *dev,
|
|||
{
|
||||
return sprintf(buf, "%s %s\n", "S5K6B2YX", "S5K6B2YX");
|
||||
}
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_MACH_MELIUS)
|
||||
|
||||
static DEVICE_ATTR(front_camtype, S_IRUGO, s5k6b2yx_camera_type_show, NULL);
|
||||
static DEVICE_ATTR(front_camfw, S_IRUGO, s5k6b2yx_camera_fw_show, NULL);
|
||||
#endif
|
||||
|
||||
|
||||
static int __init s5k6b2yx_sensor_init_module(void)
|
||||
{
|
||||
#if !defined(CONFIG_MACH_MELIUS)
|
||||
struct device *cam_dev_front = NULL;
|
||||
|
||||
cam_dev_front =
|
||||
device_create(camera_class, NULL, 0, NULL, "front");
|
||||
if (IS_ERR(cam_dev_front)) {
|
||||
|
@ -732,7 +723,7 @@ static int __init s5k6b2yx_sensor_init_module(void)
|
|||
cam_err("failed to create device file, %s\n",
|
||||
dev_attr_front_camfw.attr.name);
|
||||
}
|
||||
#endif
|
||||
|
||||
return i2c_add_driver(&s5k6b2yx_i2c_driver);
|
||||
}
|
||||
|
||||
|
|
|
@ -311,6 +311,13 @@ static int msm_ctrl_cmd_done(void *arg)
|
|||
goto ctrl_cmd_done_error;
|
||||
}
|
||||
|
||||
if(command->queue_idx < 0 ||
|
||||
command->queue_idx >= MAX_NUM_ACTIVE_CAMERA) {
|
||||
pr_err("%s: Invalid value OR index %d\n", __func__,
|
||||
command->queue_idx);
|
||||
goto ctrl_cmd_done_error;
|
||||
}
|
||||
|
||||
if (!g_server_dev.server_queue[command->queue_idx].queue_active) {
|
||||
pr_err("%s: Invalid queue\n", __func__);
|
||||
goto ctrl_cmd_done_error;
|
||||
|
@ -339,7 +346,8 @@ static int msm_ctrl_cmd_done(void *arg)
|
|||
max_control_command_size);
|
||||
goto ctrl_cmd_done_error;
|
||||
}
|
||||
if (copy_from_user(command->value, uptr, command->length)) {
|
||||
if (copy_from_user(command->value, (void __user *)uptr,
|
||||
command->length)) {
|
||||
pr_err("%s: copy_from_user failed, size=%d\n",
|
||||
__func__, sizeof(struct msm_ctrl_cmd));
|
||||
goto ctrl_cmd_done_error;
|
||||
|
@ -1412,9 +1420,7 @@ static long msm_ioctl_server(struct file *file, void *fh,
|
|||
case MSM_CAM_IOCTL_V4L2_EVT_NATIVE_CMD:
|
||||
pr_err("%s: MSM_CAM_IOCTL_V4L2_EVT_NATIVE_CMD : %d\n",
|
||||
__func__, _IOC_NR(cmd));
|
||||
#if !defined(CONFIG_MACH_MELIUS)
|
||||
sensor_native_control(arg);
|
||||
#endif
|
||||
rc = 0;
|
||||
break;
|
||||
case MSM_CAM_IOCTL_V4L2_EVT_NATIVE_FRONT_CMD:
|
||||
|
@ -2633,13 +2639,17 @@ int msm_server_send_ctrl(struct msm_ctrl_cmd *out,
|
|||
struct msm_queue_cmd *event_qcmd;
|
||||
struct msm_ctrl_cmd *ctrlcmd;
|
||||
struct msm_cam_server_dev *server_dev = &g_server_dev;
|
||||
struct msm_device_queue *queue =
|
||||
&server_dev->server_queue[out->queue_idx].ctrl_q;
|
||||
|
||||
struct msm_device_queue *queue;
|
||||
struct v4l2_event v4l2_evt;
|
||||
struct msm_isp_event_ctrl *isp_event;
|
||||
void *ctrlcmd_data;
|
||||
|
||||
if(out->queue_idx < 0 || out->queue_idx >= MAX_NUM_ACTIVE_CAMERA) {
|
||||
pr_err("%s: Invalid index %d\n", __func__, out->queue_idx);
|
||||
return -EINVAL;
|
||||
}
|
||||
queue = &server_dev->server_queue[out->queue_idx].ctrl_q;
|
||||
|
||||
event_qcmd = kzalloc(sizeof(struct msm_queue_cmd), GFP_KERNEL);
|
||||
if (!event_qcmd) {
|
||||
pr_err("%s Insufficient memory. return", __func__);
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* of the SiliconBackplane-based Broadcom chips.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -233,7 +233,7 @@ ai_scan(si_t *sih, void *regs, uint devid)
|
|||
asd = get_asd(sih, &eromptr, 0, 0, AD_ST_SLAVE, &addrl, &addrh, &sizel, &sizeh);
|
||||
if (asd == 0) {
|
||||
do {
|
||||
|
||||
|
||||
asd = get_asd(sih, &eromptr, 0, 0, AD_ST_BRIDGE, &addrl, &addrh,
|
||||
&sizel, &sizeh);
|
||||
if (asd != 0)
|
||||
|
@ -256,7 +256,7 @@ ai_scan(si_t *sih, void *regs, uint devid)
|
|||
}
|
||||
sii->coresba[idx] = addrl;
|
||||
sii->coresba_size[idx] = sizel;
|
||||
|
||||
|
||||
j = 1;
|
||||
do {
|
||||
asd = get_asd(sih, &eromptr, 0, j, AD_ST_SLAVE, &addrl, &addrh,
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* bcmevent read-only data shared by kernel or app layers
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -110,7 +110,7 @@ const bcmevent_name_t bcmevent_names[] = {
|
|||
{ WLC_E_ACTION_FRAME_RX_NDIS, "WLC_E_ACTION_FRAME_RX_NDIS" },
|
||||
{ WLC_E_AUTH_REQ, "WLC_E_AUTH_REQ" },
|
||||
{ WLC_E_IBSS_COALESCE, "IBSS COALESCE" },
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BCMWAPI_WAI
|
||||
{ WLC_E_WAI_STA_EVENT, "WAI_STA_EVENT" },
|
||||
{ WLC_E_WAI_MSG, "WAI_MSG" },
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* implement bcmsdh API for SDIOH driver
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -636,7 +636,7 @@ bcmsdh_waitlockfree(void *sdh)
|
|||
}
|
||||
|
||||
|
||||
#ifdef BCMSPI /* 4329 gSPI won't have CIS reads. */
|
||||
#ifdef BCMSPI /* 4329 gSPI won't have CIS reads. */
|
||||
int
|
||||
bcmsdh_query_device(void *sdh)
|
||||
{
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* SDIO access interface for drivers - linux specific (pci only)
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BCMSDH Function Driver for the native SDIO/MMC driver in the Linux Kernel
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BCMSDH Function Driver for the native SDIO/MMC driver in the Linux Kernel
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Driver O/S-independent utility routines
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -20,7 +20,7 @@
|
|||
* Notwithstanding the above, under no circumstances may you combine this
|
||||
* software in any way with any other Broadcom software provided under a license
|
||||
* other than the GPL, without Broadcom's express prior written consent.
|
||||
* $Id: bcmutils.c 440953 2013-12-04 13:39:58Z $
|
||||
* $Id: bcmutils.c 427979 2013-10-07 08:35:57Z $
|
||||
*/
|
||||
|
||||
#include <bcm_cfg.h>
|
||||
|
@ -2313,7 +2313,7 @@ bcm_uint64_divide(uint32* r, uint32 a_high, uint32 a_low, uint32 b)
|
|||
*r = r0;
|
||||
}
|
||||
|
||||
#ifndef setbit /* As in the header file */
|
||||
#ifndef setbit /* As in the header file */
|
||||
#ifdef BCMUTILS_BIT_MACROS_USE_FUNCS
|
||||
/* Set bit in byte array. */
|
||||
void
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
* software that might want wifi things as it grows.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -439,12 +439,12 @@ wf_chspec_aton(const char *a)
|
|||
if (!read_uint(&a, &num))
|
||||
return 0;
|
||||
|
||||
|
||||
|
||||
c = tolower((int)a[0]);
|
||||
if (c == 'g') {
|
||||
a ++;
|
||||
|
||||
a ++;
|
||||
|
||||
|
||||
if (num == 2)
|
||||
chspec_band = WL_CHANSPEC_BAND_2G;
|
||||
else if (num == 5)
|
||||
|
@ -459,7 +459,7 @@ wf_chspec_aton(const char *a)
|
|||
c = tolower((int)a[0]);
|
||||
}
|
||||
else {
|
||||
|
||||
|
||||
ctl_ch = num;
|
||||
chspec_band = ((ctl_ch <= CH_MAX_2G_CHANNEL) ?
|
||||
WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G);
|
||||
|
@ -501,11 +501,11 @@ wf_chspec_aton(const char *a)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
c = tolower((int)a[0]);
|
||||
|
||||
|
||||
|
||||
if (chspec_band == WL_CHANSPEC_BAND_2G && bw == 40) {
|
||||
if (c == 'u' || c == 'l') {
|
||||
a ++;
|
||||
|
@ -762,7 +762,7 @@ wf_chspec_valid(chanspec_t chanspec)
|
|||
}
|
||||
|
||||
if (i == num_ch) {
|
||||
|
||||
|
||||
if (chspec_ch == 165)
|
||||
i = 0;
|
||||
|
||||
|
@ -887,7 +887,7 @@ wf_channel2chspec(uint ctl_ch, uint bw)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
if (sb < 0) {
|
||||
return 0;
|
||||
}
|
||||
|
@ -895,7 +895,7 @@ wf_channel2chspec(uint ctl_ch, uint bw)
|
|||
return chspec;
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
extern chanspec_t wf_chspec_primary40_chspec(chanspec_t chspec)
|
||||
|
@ -990,10 +990,10 @@ wf_channel2mhz(uint ch, uint start_factor)
|
|||
|
||||
|
||||
static const struct chan_info {
|
||||
uint16 chan;
|
||||
uint16 freq;
|
||||
uint16 chan;
|
||||
uint16 freq;
|
||||
} chan_info[] = {
|
||||
|
||||
|
||||
{1, 2412},
|
||||
{2, 2417},
|
||||
{3, 2422},
|
||||
|
@ -1056,7 +1056,7 @@ static const struct chan_info {
|
|||
{208, 5040},
|
||||
{212, 5060},
|
||||
{216, 5080}
|
||||
#endif
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
* both the wl driver, tools & Apps.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -42,8 +42,8 @@ typedef uint16 chanspec_t;
|
|||
#define CH_20MHZ_APART 4
|
||||
#define CH_10MHZ_APART 2
|
||||
#define CH_5MHZ_APART 1
|
||||
#define CH_MAX_2G_CHANNEL 14
|
||||
#define MAXCHANNEL 224
|
||||
#define CH_MAX_2G_CHANNEL 14
|
||||
#define MAXCHANNEL 224
|
||||
#define CHSPEC_CTLOVLP(sp1, sp2, sep) (ABS(wf_chspec_ctlchan(sp1) - wf_chspec_ctlchan(sp2)) < \
|
||||
(sep))
|
||||
|
||||
|
@ -311,7 +311,7 @@ typedef uint16 chanspec_t;
|
|||
WL_LCHANSPEC_CTL_SB_NONE | (((channel) <= CH_MAX_2G_CHANNEL) ? \
|
||||
WL_LCHANSPEC_BAND_2G : WL_LCHANSPEC_BAND_5G))
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
@ -322,9 +322,9 @@ typedef uint16 chanspec_t;
|
|||
#define WF_CHAN_FACTOR_5_G 10000
|
||||
|
||||
|
||||
#define WF_CHAN_FACTOR_4_G 8000
|
||||
#define WF_CHAN_FACTOR_4_G 8000
|
||||
|
||||
#define WLC_2G_25MHZ_OFFSET 5
|
||||
#define WLC_2G_25MHZ_OFFSET 5
|
||||
|
||||
|
||||
extern char * wf_chspec_ntoa(chanspec_t chspec, char *buf);
|
||||
|
@ -360,4 +360,4 @@ extern uint wf_channel2freq(uint channel);
|
|||
extern uint wf_freq2channel(uint freq);
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Indices for 802.11 a/b/g/n/ac 1-3 chain symmetric transmit rates
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -195,9 +195,9 @@ typedef enum clm_rates {
|
|||
WL_RATE_2X2_VHT8SS2 = 62,
|
||||
WL_RATE_2X2_VHT9SS2 = 63,
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
WL_RATE_1X3_DSSS_1 = 64,
|
||||
WL_RATE_1X3_DSSS_2 = 65,
|
||||
WL_RATE_1X3_DSSS_5_5 = 66,
|
||||
|
@ -295,9 +295,9 @@ typedef enum clm_rates {
|
|||
WL_RATE_3X3_VHT9SS3 = 115,
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
WL_RATE_1X2_TXBF_OFDM_6 = 116,
|
||||
WL_RATE_1X2_TXBF_OFDM_9 = 117,
|
||||
|
@ -328,7 +328,7 @@ typedef enum clm_rates {
|
|||
WL_RATE_1X2_TXBF_VHT8SS1 = 132,
|
||||
WL_RATE_1X2_TXBF_VHT9SS1 = 133,
|
||||
|
||||
|
||||
|
||||
|
||||
WL_RATE_2X2_TXBF_SDM_MCS8 = 134,
|
||||
WL_RATE_2X2_TXBF_SDM_MCS9 = 135,
|
||||
|
@ -349,9 +349,9 @@ typedef enum clm_rates {
|
|||
WL_RATE_2X2_TXBF_VHT7SS2 = 141,
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
WL_RATE_1X3_TXBF_OFDM_6 = 142,
|
||||
WL_RATE_1X3_TXBF_OFDM_9 = 143,
|
||||
|
@ -382,7 +382,7 @@ typedef enum clm_rates {
|
|||
WL_RATE_1X3_TXBF_VHT8SS1 = 158,
|
||||
WL_RATE_1X3_TXBF_VHT9SS1 = 159,
|
||||
|
||||
|
||||
|
||||
|
||||
WL_RATE_2X3_TXBF_SDM_MCS8 = 160,
|
||||
WL_RATE_2X3_TXBF_SDM_MCS9 = 161,
|
||||
|
@ -404,7 +404,7 @@ typedef enum clm_rates {
|
|||
WL_RATE_2X3_TXBF_VHT8SS2 = 168,
|
||||
WL_RATE_2X3_TXBF_VHT9SS2 = 169,
|
||||
|
||||
|
||||
|
||||
|
||||
WL_RATE_3X3_TXBF_SDM_MCS16 = 170,
|
||||
WL_RATE_3X3_TXBF_SDM_MCS17 = 171,
|
||||
|
@ -430,6 +430,6 @@ typedef enum clm_rates {
|
|||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -5,7 +5,7 @@
|
|||
* DHD OS, bus, and protocol modules.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -301,7 +301,7 @@ typedef struct dhd_pub {
|
|||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)) && 1
|
||||
struct mutex wl_start_stop_lock; /* lock/unlock for Android start/stop */
|
||||
struct mutex wl_softap_lock; /* lock/unlock for any SoftAP/STA settings */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef WLBTAMP
|
||||
uint16 maxdatablks;
|
||||
|
@ -1077,6 +1077,7 @@ concate_revision(struct dhd_bus *bus, char *fwpath, int fw_path_len, char *nvpat
|
|||
extern int wifi_get_fw_nv_path(char *fw, char *nv);
|
||||
#endif
|
||||
#endif /* SUPPORT_MULTIPLE_REVISION */
|
||||
void dhd_bus_update_fw_nv_path(struct dhd_bus *bus, char *pfw_path, char *pnv_path);
|
||||
void dhd_set_bus_state(void *bus, uint32 state);
|
||||
|
||||
/* Remove proper pkts(either one no-frag pkt or whole fragmented pkts) */
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BT-AMP support routines
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BT-AMP support routines
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -5,7 +5,7 @@
|
|||
* DHD OS, bus, and protocol modules.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* DHD Protocol Module for CDC and BDC.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -582,10 +582,7 @@ dhd_prot_init(dhd_pub_t *dhd)
|
|||
goto done;
|
||||
|
||||
|
||||
#if defined(WL_CFG80211)
|
||||
if (dhd_download_fw_on_driverload)
|
||||
#endif /* defined(WL_CFG80211) */
|
||||
ret = dhd_preinit_ioctls(dhd);
|
||||
ret = dhd_preinit_ioctls(dhd);
|
||||
/* Always assumes wl for now */
|
||||
dhd->iswl = TRUE;
|
||||
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Linux cfg80211 driver - Dongle Host Driver (DHD) related
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -695,4 +695,4 @@ int wl_cfg80211_set_btcoex_dhcp(struct net_device *dev, char *command)
|
|||
|
||||
return (strlen("OK"));
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Linux cfg80211 driver - Dongle Host Driver (DHD) related
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom Dongle Host Driver (DHD), common DHD core.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Customer code to add GPIO control during WLAN start/stop
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -54,7 +54,7 @@ int wifi_get_irq_number(unsigned long *irq_flags_ptr) { return -1; }
|
|||
int wifi_get_mac_addr(unsigned char *buf) { return -1; }
|
||||
void *wifi_get_country_code(char *ccode) { return NULL; }
|
||||
#endif /* CONFIG_WIFI_CONTROL_FUNC */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(OOB_INTR_ONLY) || defined(BCMSPI_ANDROID)
|
||||
|
||||
|
@ -110,8 +110,8 @@ int dhd_customer_oob_irq_map(unsigned long *irq_flags_ptr)
|
|||
gpio_request(dhd_oob_gpio_num, "oob irq");
|
||||
host_oob_irq = gpio_to_irq(dhd_oob_gpio_num);
|
||||
gpio_direction_input(dhd_oob_gpio_num);
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
return (host_oob_irq);
|
||||
}
|
||||
|
@ -275,6 +275,6 @@ void get_customized_country_code(char *country_iso_code, wl_country_t *cspec)
|
|||
cspec->rev = translate_custom_table[0].custom_locale_rev;
|
||||
#endif /* EXMAPLE_TABLE */
|
||||
return;
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
#endif /* CUSTOMER_HW4 */
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Debug/trace/assert driver definitions for Dongle Host Driver.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -120,7 +120,7 @@
|
|||
#define DHD_NOCHECKDIED_ON() 0
|
||||
#define DHD_PNO_ON() 0
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define DHD_LOG(args)
|
||||
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* Basically selected code segments from usb-cdc.c and usb-rndis.c
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -55,6 +55,7 @@
|
|||
#include <bcmutils.h>
|
||||
#include <bcmendian.h>
|
||||
#include <bcmdevs.h>
|
||||
#include <bcmsdbus.h>
|
||||
|
||||
#include <proto/ethernet.h>
|
||||
#include <proto/bcmip.h>
|
||||
|
@ -174,7 +175,7 @@ extern void dhd_enable_oob_intr(struct dhd_bus *bus, bool enable);
|
|||
#endif /* defined(OOB_INTR_ONLY) || defined(BCMSPI_ANDROID) */
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) && (1)
|
||||
static void dhd_hang_process(struct work_struct *work);
|
||||
#endif
|
||||
#endif
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0))
|
||||
MODULE_LICENSE("GPL v2");
|
||||
#endif /* LinuxVer */
|
||||
|
@ -632,6 +633,7 @@ static char dhd_version[] = "Dongle Host Driver, version " EPI_VERSION_STR
|
|||
"\nCompiled in " SRCBASE " on " __DATE__ " at " __TIME__
|
||||
#endif
|
||||
;
|
||||
int dhd_dev_reset(struct net_device *dev, uint8 flag);
|
||||
static void dhd_net_if_lock_local(dhd_info_t *dhd);
|
||||
static void dhd_net_if_unlock_local(dhd_info_t *dhd);
|
||||
static void dhd_suspend_lock(dhd_pub_t *dhdp);
|
||||
|
@ -2223,7 +2225,7 @@ dhd_rx_frame(dhd_pub_t *dhdp, int ifidx, void *pktbuf, int numpkt, uint8 chan)
|
|||
PKTFREE(dhdp->osh, pktbuf, TRUE);
|
||||
continue;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
} else {
|
||||
tout_rx = DHD_PACKET_TIMEOUT_MS;
|
||||
}
|
||||
|
@ -3320,7 +3322,7 @@ exit:
|
|||
}
|
||||
}
|
||||
#endif /* SUPPORT_DEEP_SLEEP */
|
||||
#endif
|
||||
#endif
|
||||
dhd->pub.rxcnt_timeout = 0;
|
||||
dhd->pub.txcnt_timeout = 0;
|
||||
|
||||
|
@ -3391,18 +3393,6 @@ dhd_open(struct net_device *net)
|
|||
}
|
||||
#endif /* CUSTOMER_HW4 */
|
||||
|
||||
#if defined(SUPPORT_MULTIPLE_REVISION)
|
||||
/* dhd_open() can be call several times when loading failed */
|
||||
if (strlen(firmware_path) != 0) {
|
||||
ret = concate_revision(dhd->pub.bus, fw_path, MOD_PARAM_PATHLEN,
|
||||
nv_path, MOD_PARAM_PATHLEN);
|
||||
if (ret != 0) {
|
||||
DHD_ERROR(("%s: fail to concatnate revison \n", __FUNCTION__));
|
||||
goto exit;
|
||||
}
|
||||
}
|
||||
#endif /* SUPPORT_MULTIPLE_REVISION */
|
||||
|
||||
#ifdef CUSTOMER_HW4
|
||||
#ifdef FIX_CPU_MIN_CLOCK
|
||||
if (strstr(fw_path, "_apsta")) {
|
||||
|
@ -3427,7 +3417,7 @@ dhd_open(struct net_device *net)
|
|||
goto exit;
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
ifidx = dhd_net2idx(dhd, net);
|
||||
DHD_TRACE(("%s: ifidx %d\n", __FUNCTION__, ifidx));
|
||||
|
@ -3449,6 +3439,8 @@ dhd_open(struct net_device *net)
|
|||
#if defined(WL_CFG80211)
|
||||
DHD_ERROR(("\n%s\n", dhd_version));
|
||||
if (!dhd_download_fw_on_driverload) {
|
||||
/* update firmware and nvram path to SDIO bus */
|
||||
dhd_bus_update_fw_nv_path(dhd->pub.bus, fw_path, nv_path);
|
||||
ret = wl_android_wifi_on(net);
|
||||
if (ret != 0) {
|
||||
DHD_ERROR(("%s : wl_android_wifi_on failed (%d)\n",
|
||||
|
@ -3479,7 +3471,7 @@ dhd_open(struct net_device *net)
|
|||
}
|
||||
}
|
||||
#endif /* SUPPORT_DEEP_SLEEP */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
if (dhd->pub.busstate != DHD_BUS_DATA) {
|
||||
|
||||
|
@ -3710,14 +3702,6 @@ dhd_attach(osl_t *osh, struct dhd_bus *bus, uint bus_hdrlen)
|
|||
bzero(nv_path, MOD_PARAM_PATHLEN);
|
||||
strncpy(nv_path, nvram_path, sizeof(nv_path) -1);
|
||||
}
|
||||
#if defined(SUPPORT_MULTIPLE_REVISION)
|
||||
if (strlen(fw_path) != 0 &&
|
||||
concate_revision(bus, fw_path, MOD_PARAM_PATHLEN,
|
||||
nv_path, MOD_PARAM_PATHLEN) != 0) {
|
||||
DHD_ERROR(("%s: fail to concatnate revison \n", __FUNCTION__));
|
||||
goto fail;
|
||||
}
|
||||
#endif /* SUPPORT_MULTIPLE_REVISION */
|
||||
|
||||
/* Allocate etherdev, including space for private structure */
|
||||
if (!(net = alloc_etherdev(sizeof(dhd)))) {
|
||||
|
@ -4472,7 +4456,7 @@ dhd_preinit_ioctls(dhd_pub_t *dhd)
|
|||
}
|
||||
#else
|
||||
(void)concurrent_mode;
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
DHD_ERROR(("Firmware up: op_mode=0x%04x, "
|
||||
|
@ -4598,7 +4582,7 @@ dhd_preinit_ioctls(dhd_pub_t *dhd)
|
|||
|
||||
#if defined(SOFTAP)
|
||||
if (ap_fw_loaded == FALSE)
|
||||
#endif
|
||||
#endif
|
||||
if (!(dhd->op_mode & DHD_FLAG_HOSTAP_MODE)) {
|
||||
if ((res = dhd_keep_alive_onoff(dhd)) < 0)
|
||||
DHD_ERROR(("%s set keeplive failed %d\n",
|
||||
|
@ -4835,7 +4819,7 @@ dhd_preinit_ioctls(dhd_pub_t *dhd)
|
|||
#if defined(PROP_TXSTATUS) && defined(PROP_TXSTATUS_VSDB)
|
||||
bcm_mkiovar("ampdu_hostreorder", (char *)&hostreorder, 4, buf, sizeof(buf));
|
||||
dhd_wl_ioctl_cmd(dhd, WLC_SET_VAR, buf, sizeof(buf), TRUE, 0);
|
||||
#endif
|
||||
#endif
|
||||
#endif /* DISABLE_11N */
|
||||
|
||||
#if defined(VSDB) && defined(CUSTOMER_HW4)
|
||||
|
@ -5259,10 +5243,14 @@ dhd_net_attach(dhd_pub_t *dhdp, int ifidx)
|
|||
|
||||
#if 1 && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27))
|
||||
if (ifidx == 0) {
|
||||
if (!dhd_download_fw_on_driverload) {
|
||||
dhd_dev_reset(net, TRUE);
|
||||
sdioh_stop(NULL);
|
||||
}
|
||||
dhd_registration_check = TRUE;
|
||||
up(&dhd_registration_sem);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
return 0;
|
||||
|
||||
fail:
|
||||
|
@ -5550,7 +5538,7 @@ dhd_module_init(void)
|
|||
DHD_ERROR(("Invalid module parameters.\n"));
|
||||
error = -EINVAL;
|
||||
} while (0);
|
||||
#endif
|
||||
#endif
|
||||
if (error)
|
||||
goto fail_0;
|
||||
|
||||
|
@ -5596,7 +5584,7 @@ dhd_module_init(void)
|
|||
goto fail_1;
|
||||
#endif /* defined(CONFIG_WIFI_CONTROL_FUNC) */
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_WIFI_CONTROL_FUNC) && defined(BCMLXSDMMC)
|
||||
/* If the wifi_set_power() is failed,
|
||||
|
@ -5611,7 +5599,7 @@ dhd_module_init(void)
|
|||
|
||||
#if 1 && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27))
|
||||
sema_init(&dhd_registration_sem, 0);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
error = dhd_bus_register();
|
||||
|
@ -6165,7 +6153,7 @@ void dhd_wait_for_event(dhd_pub_t *dhd, bool *lockvar)
|
|||
dhd_os_sdunlock(dhd);
|
||||
wait_event_timeout(dhdinfo->ctrl_wait, (*lockvar == FALSE), timeout);
|
||||
dhd_os_sdlock(dhd);
|
||||
#endif
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -6347,7 +6335,7 @@ dhd_dev_init_ioctl(struct net_device *dev)
|
|||
|
||||
dhd_process_cid_mac(&dhd->pub, TRUE);
|
||||
|
||||
if ((ret = dhd_preinit_ioctls(&dhd->pub)) < 0)
|
||||
if ((ret = dhd_prot_init(&dhd->pub)) < 0)
|
||||
goto done;
|
||||
|
||||
dhd_process_cid_mac(&dhd->pub, FALSE);
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Expose some of the kernel scheduler routines
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -5,7 +5,7 @@
|
|||
* DHD OS, bus, and protocol modules.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* DHD Bus Module for SDIO
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -174,7 +174,7 @@ extern int dhd_os_wlfc_unblock(dhd_pub_t *pub);
|
|||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25))
|
||||
DEFINE_MUTEX(_dhd_sdio_mutex_lock_);
|
||||
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)) */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef DHD_DEBUG
|
||||
/* Device console log buffer state */
|
||||
|
@ -1710,7 +1710,7 @@ dhd_tcpack_suppress(dhd_pub_t *dhdp, void *pkt)
|
|||
#if defined(DHD_DEBUG)
|
||||
uint32 tcp_seq_num = tcp_header[4] << 24 | tcp_header[5] << 16 |
|
||||
tcp_header[6] << 8 | tcp_header[7];
|
||||
#endif
|
||||
#endif
|
||||
uint32 tcp_ack_num = tcp_header[8] << 24 | tcp_header[9] << 16 |
|
||||
tcp_header[10] << 8 | tcp_header[11];
|
||||
uint16 ip_tcp_ttllen = (ip_header[3] & 0xff) + (ip_header[2] << 8);
|
||||
|
@ -6677,7 +6677,7 @@ dhdsdio_isr(void *arg)
|
|||
bus->dpc_sched = TRUE;
|
||||
dhd_sched_dpc(bus->dhd);
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
@ -7282,7 +7282,7 @@ dhdsdio_probe(uint16 venid, uint16 devid, uint16 bus_no, uint16 slot,
|
|||
}
|
||||
mutex_lock(&_dhd_sdio_mutex_lock_);
|
||||
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)) */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Init global variables at run-time, not as part of the declaration.
|
||||
* This is required to support init/de-init of the driver. Initialization
|
||||
|
@ -7475,7 +7475,7 @@ dhdsdio_probe(uint16 venid, uint16 devid, uint16 bus_no, uint16 slot,
|
|||
mutex_unlock(&_dhd_sdio_mutex_lock_);
|
||||
DHD_ERROR(("%s : the lock is released.\n", __FUNCTION__));
|
||||
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
return bus;
|
||||
|
||||
|
@ -7488,7 +7488,7 @@ forcereturn:
|
|||
mutex_unlock(&_dhd_sdio_mutex_lock_);
|
||||
DHD_ERROR(("%s : the lock is released.\n", __FUNCTION__));
|
||||
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
@ -7858,6 +7858,17 @@ dhdsdio_download_firmware(struct dhd_bus *bus, osl_t *osh, void *sdh)
|
|||
{
|
||||
bool ret;
|
||||
|
||||
#if defined(SUPPORT_MULTIPLE_REVISION)
|
||||
if (concate_revision(bus, bus->fw_path, sizeof(bus->fw_path),
|
||||
bus->nv_path, sizeof(bus->nv_path)) != 0) {
|
||||
DHD_ERROR(("%s: fail to concatnate revison \n",
|
||||
__FUNCTION__));
|
||||
return BCME_BADARG;
|
||||
}
|
||||
#endif /* SUPPORT_MULTIPLE_REVISION */
|
||||
|
||||
DHD_TRACE_HW4(("%s: firmware path=%s, nvram path=%s\n",
|
||||
__FUNCTION__, bus->fw_path, bus->nv_path));
|
||||
DHD_OS_WAKE_LOCK(bus->dhd);
|
||||
|
||||
/* Download the firmware */
|
||||
|
@ -7990,7 +8001,7 @@ dhdsdio_disconnect(void *ptr)
|
|||
}
|
||||
mutex_lock(&_dhd_sdio_mutex_lock_);
|
||||
#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)) */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
if (bus) {
|
||||
|
@ -8832,6 +8843,13 @@ concate_revision(dhd_bus_t *bus, char *fw_path, int fw_path_len, char *nv_path,
|
|||
}
|
||||
#endif /* SUPPORT_MULTIPLE_REVISION */
|
||||
|
||||
void
|
||||
dhd_bus_update_fw_nv_path(struct dhd_bus *bus, char *pfw_path, char *pnv_path)
|
||||
{
|
||||
bus->fw_path = pfw_path;
|
||||
bus->nv_path = pnv_path;
|
||||
}
|
||||
|
||||
int
|
||||
dhd_enableOOB(dhd_pub_t *dhd, bool sleep)
|
||||
{
|
||||
|
|
|
@ -141,8 +141,8 @@
|
|||
#endif /* CONFIG_WLAN_REGION_CODE >= 300 && CONFIG_WLAN_REGION_CODE < 400 */
|
||||
|
||||
#if (CONFIG_WLAN_REGION_CODE == 402) /* TMO */
|
||||
#undef CUSTOM_SUSPEND_BCN_LI_DTIM
|
||||
#define CUSTOM_SUSPEND_BCN_LI_DTIM 3
|
||||
#undef DCUSTOM_SUSPEND_BCN_LI_DTIM
|
||||
#define DCUSTOM_SUSPEND_BCN_LI_DTIM 3
|
||||
#endif /* CONFIG_WLAN_REGION_CODE == 402 */
|
||||
|
||||
#if !defined(READ_MACADDR) && !defined(WRITE_MACADDR) && !defined(RDWR_KORICS_MACADDR) \
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* ports
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Dongle WL Header definitions
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* of the SiliconBackplane-based Broadcom chips.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom AMBA Interconnect definitions.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -383,4 +383,4 @@ typedef volatile struct _aidmp {
|
|||
#define AI_OOBSEL_6_SHIFT 16
|
||||
#define AI_OOBSEL_7_SHIFT 24
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BCM common config options
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
* allocation implementation.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -5,7 +5,7 @@
|
|||
* Definitions subject to change without notice.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Misc system wide definitions
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -64,7 +64,7 @@
|
|||
#define BCMFASTPATH
|
||||
#define BCMFASTPATH_HOST
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
@ -186,13 +186,13 @@ typedef struct {
|
|||
#if defined(BCM_RPC_NOCOPY) || defined(BCM_RCP_TXNOCOPY)
|
||||
|
||||
#define BCMEXTRAHDROOM 260
|
||||
#else
|
||||
#else
|
||||
#if defined(BCM47XX_CA9)
|
||||
#define BCMEXTRAHDROOM 224
|
||||
#else
|
||||
#define BCMEXTRAHDROOM 204
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef SDALIGN
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom device-specific manifest constants.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -21,7 +21,7 @@
|
|||
* software in any way with any other Broadcom software provided under a license
|
||||
* other than the GPL, without Broadcom's express prior written consent.
|
||||
*
|
||||
* $Id: bcmdevs.h 444038 2013-12-18 09:35:07Z $
|
||||
* $Id: bcmdevs.h 414368 2013-07-24 15:00:23Z $
|
||||
*/
|
||||
|
||||
#ifndef _BCMDEVS_H
|
||||
|
@ -135,14 +135,14 @@
|
|||
#define BCM4330_D11N_ID 0x4360
|
||||
#define BCM4330_D11N2G_ID 0x4361
|
||||
#define BCM4330_D11N5G_ID 0x4362
|
||||
#define BCM4336_D11N_ID 0x4343
|
||||
#define BCM6362_D11N_ID 0x435f
|
||||
#define BCM6362_D11N2G_ID 0x433f
|
||||
#define BCM6362_D11N5G_ID 0x434f
|
||||
#define BCM4331_D11N_ID 0x4331
|
||||
#define BCM4331_D11N2G_ID 0x4332
|
||||
#define BCM4331_D11N5G_ID 0x4333
|
||||
#define BCM43237_D11N_ID 0x4355
|
||||
#define BCM4336_D11N_ID 0x4343
|
||||
#define BCM6362_D11N_ID 0x435f
|
||||
#define BCM6362_D11N2G_ID 0x433f
|
||||
#define BCM6362_D11N5G_ID 0x434f
|
||||
#define BCM4331_D11N_ID 0x4331
|
||||
#define BCM4331_D11N2G_ID 0x4332
|
||||
#define BCM4331_D11N5G_ID 0x4333
|
||||
#define BCM43237_D11N_ID 0x4355
|
||||
#define BCM43237_D11N5G_ID 0x4356
|
||||
#define BCM43227_D11N2G_ID 0x4358
|
||||
#define BCM43228_D11N_ID 0x4359
|
||||
|
@ -152,27 +152,27 @@
|
|||
#define BCM4324_D11N_ID 0x4374
|
||||
#define BCM43217_D11N2G_ID 0x43a9
|
||||
#define BCM43131_D11N2G_ID 0x43aa
|
||||
#define BCM4314_D11N2G_ID 0x4364
|
||||
#define BCM43142_D11N2G_ID 0x4365
|
||||
#define BCM43143_D11N2G_ID 0x4366
|
||||
#define BCM4334_D11N_ID 0x4380
|
||||
#define BCM4334_D11N2G_ID 0x4381
|
||||
#define BCM4334_D11N5G_ID 0x4382
|
||||
#define BCM43342_D11N_ID 0x4383
|
||||
#define BCM43342_D11N2G_ID 0x4384
|
||||
#define BCM43342_D11N5G_ID 0x4385
|
||||
#define BCM43341_D11N_ID 0x4386
|
||||
#define BCM43341_D11N2G_ID 0x4387
|
||||
#define BCM43341_D11N5G_ID 0x4388
|
||||
#define BCM4314_D11N2G_ID 0x4364
|
||||
#define BCM43142_D11N2G_ID 0x4365
|
||||
#define BCM43143_D11N2G_ID 0x4366
|
||||
#define BCM4334_D11N_ID 0x4380
|
||||
#define BCM4334_D11N2G_ID 0x4381
|
||||
#define BCM4334_D11N5G_ID 0x4382
|
||||
#define BCM43342_D11N_ID 0x4383
|
||||
#define BCM43342_D11N2G_ID 0x4384
|
||||
#define BCM43342_D11N5G_ID 0x4385
|
||||
#define BCM43341_D11N_ID 0x4386
|
||||
#define BCM43341_D11N2G_ID 0x4387
|
||||
#define BCM43341_D11N5G_ID 0x4388
|
||||
#define BCM4360_D11AC_ID 0x43a0
|
||||
#define BCM4360_D11AC2G_ID 0x43a1
|
||||
#define BCM4360_D11AC5G_ID 0x43a2
|
||||
#define BCM4335_D11AC_ID 0x43ae
|
||||
#define BCM4335_D11AC2G_ID 0x43af
|
||||
#define BCM4335_D11AC5G_ID 0x43b0
|
||||
#define BCM4352_D11AC_ID 0x43b1
|
||||
#define BCM4352_D11AC2G_ID 0x43b2
|
||||
#define BCM4352_D11AC5G_ID 0x43b3
|
||||
#define BCM4352_D11AC_ID 0x43b1
|
||||
#define BCM4352_D11AC2G_ID 0x43b2
|
||||
#define BCM4352_D11AC5G_ID 0x43b3
|
||||
|
||||
|
||||
#define BCM943228HMB_SSID_VEN1 0x0607
|
||||
|
@ -180,20 +180,20 @@
|
|||
#define BCM94313HMG_SSID_VEN1 0x0609
|
||||
#define BCM943142HM_SSID_VEN1 0x0611
|
||||
|
||||
#define BCM43143_D11N2G_ID 0x4366
|
||||
#define BCM43143_D11N2G_ID 0x4366
|
||||
|
||||
#define BCM43242_D11N_ID 0x4367
|
||||
#define BCM43242_D11N2G_ID 0x4368
|
||||
#define BCM43242_D11N5G_ID 0x4369
|
||||
#define BCM43242_D11N_ID 0x4367
|
||||
#define BCM43242_D11N2G_ID 0x4368
|
||||
#define BCM43242_D11N5G_ID 0x4369
|
||||
|
||||
#define BCM4350_D11AC_ID 0x43a3
|
||||
#define BCM4350_D11AC2G_ID 0x43a4
|
||||
#define BCM4350_D11AC5G_ID 0x43a5
|
||||
|
||||
|
||||
#define BCMGPRS_UART_ID 0x4333
|
||||
#define BCMGPRS2_UART_ID 0x4344
|
||||
#define FPGA_JTAGM_ID 0x43f0
|
||||
#define BCMGPRS_UART_ID 0x4333
|
||||
#define BCMGPRS2_UART_ID 0x4344
|
||||
#define FPGA_JTAGM_ID 0x43f0
|
||||
#define BCM_JTAGM_ID 0x43f1
|
||||
#define SDIOH_FPGA_ID 0x43f2
|
||||
#define BCM_SDIOH_ID 0x43f3
|
||||
|
@ -225,14 +225,14 @@
|
|||
#define BCM47XX_ATA100_ID 0x471d
|
||||
#define BCM47XX_SATAXOR_ID 0x471e
|
||||
#define BCM47XX_GIGETH_ID 0x471f
|
||||
#define BCM4712_MIPS_ID 0x4720
|
||||
#define BCM4716_DEVICE_ID 0x4722
|
||||
#define BCM47XX_USB30H_ID 0x472a
|
||||
#define BCM47XX_USB30D_ID 0x472b
|
||||
#define BCM47XX_SMBUS_EMU_ID 0x47fe
|
||||
#define BCM47XX_XOR_EMU_ID 0x47ff
|
||||
#define EPI41210_DEVICE_ID 0xa0fa
|
||||
#define EPI41230_DEVICE_ID 0xa10e
|
||||
#define BCM4712_MIPS_ID 0x4720
|
||||
#define BCM4716_DEVICE_ID 0x4722
|
||||
#define BCM47XX_USB30H_ID 0x472a
|
||||
#define BCM47XX_USB30D_ID 0x472b
|
||||
#define BCM47XX_SMBUS_EMU_ID 0x47fe
|
||||
#define BCM47XX_XOR_EMU_ID 0x47ff
|
||||
#define EPI41210_DEVICE_ID 0xa0fa
|
||||
#define EPI41230_DEVICE_ID 0xa10e
|
||||
#define JINVANI_SDIOH_ID 0x4743
|
||||
#define BCM27XX_SDIOH_ID 0x2702
|
||||
#define PCIXX21_FLASHMEDIA_ID 0x803b
|
||||
|
@ -282,34 +282,34 @@
|
|||
#define BCM43362_CHIP_ID 43362
|
||||
#define BCM4330_CHIP_ID 0x4330
|
||||
#define BCM6362_CHIP_ID 0x6362
|
||||
#define BCM4314_CHIP_ID 0x4314
|
||||
#define BCM43142_CHIP_ID 43142
|
||||
#define BCM43143_CHIP_ID 43143
|
||||
#define BCM4324_CHIP_ID 0x4324
|
||||
#define BCM43242_CHIP_ID 43242
|
||||
#define BCM43243_CHIP_ID 43243
|
||||
#define BCM4334_CHIP_ID 0x4334
|
||||
#define BCM4335_CHIP_ID 0x4335
|
||||
#define BCM4339_CHIP_ID 0x4339
|
||||
#define BCM4360_CHIP_ID 0x4360
|
||||
#define BCM4352_CHIP_ID 0x4352
|
||||
#define BCM4314_CHIP_ID 0x4314
|
||||
#define BCM43142_CHIP_ID 43142
|
||||
#define BCM43143_CHIP_ID 43143
|
||||
#define BCM4324_CHIP_ID 0x4324
|
||||
#define BCM43242_CHIP_ID 43242
|
||||
#define BCM43243_CHIP_ID 43243
|
||||
#define BCM4334_CHIP_ID 0x4334
|
||||
#define BCM4335_CHIP_ID 0x4335
|
||||
#define BCM4339_CHIP_ID 0x4339
|
||||
#define BCM4360_CHIP_ID 0x4360
|
||||
#define BCM4352_CHIP_ID 0x4352
|
||||
#define BCM43526_CHIP_ID 0xAA06
|
||||
#define BCM43340_CHIP_ID 43340
|
||||
#define BCM43341_CHIP_ID 43341
|
||||
#define BCM43342_CHIP_ID 43342
|
||||
#define BCM4350_CHIP_ID 0x4350
|
||||
#define BCM43340_CHIP_ID 43340
|
||||
#define BCM43341_CHIP_ID 43341
|
||||
#define BCM43342_CHIP_ID 43342
|
||||
#define BCM4350_CHIP_ID 0x4350
|
||||
|
||||
#define BCM4342_CHIP_ID 4342
|
||||
#define BCM4402_CHIP_ID 0x4402
|
||||
#define BCM4704_CHIP_ID 0x4704
|
||||
#define BCM4706_CHIP_ID 0x5300
|
||||
#define BCM4707_CHIP_ID 53010
|
||||
#define BCM53018_CHIP_ID 53018
|
||||
#define BCM4342_CHIP_ID 4342
|
||||
#define BCM4402_CHIP_ID 0x4402
|
||||
#define BCM4704_CHIP_ID 0x4704
|
||||
#define BCM4706_CHIP_ID 0x5300
|
||||
#define BCM4707_CHIP_ID 53010
|
||||
#define BCM53018_CHIP_ID 53018
|
||||
#define BCM4707_CHIP(chipid) (((chipid) == BCM4707_CHIP_ID) || ((chipid) == BCM53018_CHIP_ID))
|
||||
#define BCM4710_CHIP_ID 0x4710
|
||||
#define BCM4712_CHIP_ID 0x4712
|
||||
#define BCM4716_CHIP_ID 0x4716
|
||||
#define BCM47162_CHIP_ID 47162
|
||||
#define BCM4710_CHIP_ID 0x4710
|
||||
#define BCM4712_CHIP_ID 0x4712
|
||||
#define BCM4716_CHIP_ID 0x4716
|
||||
#define BCM47162_CHIP_ID 47162
|
||||
#define BCM4748_CHIP_ID 0x4748
|
||||
#define BCM4749_CHIP_ID 0x4749
|
||||
#define BCM4785_CHIP_ID 0x4785
|
||||
|
@ -365,61 +365,61 @@
|
|||
#define BCM4314PCIE_PKG_ID (8 | 2)
|
||||
#define BCM4314SDIO_ARM_PKG_ID (8 | 3)
|
||||
#define BCM4314SDIO_FPBGA_PKG_ID (8 | 4)
|
||||
#define BCM4314DEV_PKG_ID (8 | 6)
|
||||
#define BCM4314DEV_PKG_ID (8 | 6)
|
||||
|
||||
#define BCM4707_PKG_ID 1
|
||||
#define BCM4708_PKG_ID 2
|
||||
#define BCM4709_PKG_ID 0
|
||||
#define BCM4707_PKG_ID 1
|
||||
#define BCM4708_PKG_ID 2
|
||||
#define BCM4709_PKG_ID 0
|
||||
|
||||
#define PCIXX21_FLASHMEDIA0_ID 0x8033
|
||||
#define PCIXX21_SDIOH0_ID 0x8034
|
||||
#define PCIXX21_FLASHMEDIA0_ID 0x8033
|
||||
#define PCIXX21_SDIOH0_ID 0x8034
|
||||
|
||||
#define BCM4335_WLCSP_PKG_ID (0x0)
|
||||
#define BCM4335_FCBGA_PKG_ID (0x1)
|
||||
#define BCM4335_WLBGA_PKG_ID (0x2)
|
||||
#define BCM4335_FCBGAD_PKG_ID (0x3)
|
||||
#define BCM4335_WLCSP_PKG_ID (0x0)
|
||||
#define BCM4335_FCBGA_PKG_ID (0x1)
|
||||
#define BCM4335_WLBGA_PKG_ID (0x2)
|
||||
#define BCM4335_FCBGAD_PKG_ID (0x3)
|
||||
#define BCM4335_PKG_MASK (0x3)
|
||||
|
||||
|
||||
#define BFL_BTC2WIRE 0x00000001
|
||||
#define BFL_BTCOEX 0x00000001
|
||||
#define BFL_PACTRL 0x00000002
|
||||
#define BFL_AIRLINEMODE 0x00000004
|
||||
#define BFL_ADCDIV 0x00000008
|
||||
#define BFL_BTC2WIRE 0x00000001
|
||||
#define BFL_BTCOEX 0x00000001
|
||||
#define BFL_PACTRL 0x00000002
|
||||
#define BFL_AIRLINEMODE 0x00000004
|
||||
#define BFL_ADCDIV 0x00000008
|
||||
#define BFL_DIS_256QAM 0x00000008
|
||||
#define BFL_ENETROBO 0x00000010
|
||||
#define BFL_NOPLLDOWN 0x00000020
|
||||
#define BFL_CCKHIPWR 0x00000040
|
||||
#define BFL_ENETADM 0x00000080
|
||||
#define BFL_ENETVLAN 0x00000100
|
||||
#define BFL_LTECOEX 0x00000200
|
||||
#define BFL_NOPCI 0x00000400
|
||||
#define BFL_FEM 0x00000800
|
||||
#define BFL_EXTLNA 0x00001000
|
||||
#define BFL_HGPA 0x00002000
|
||||
#define BFL_ENETROBO 0x00000010
|
||||
#define BFL_NOPLLDOWN 0x00000020
|
||||
#define BFL_CCKHIPWR 0x00000040
|
||||
#define BFL_ENETADM 0x00000080
|
||||
#define BFL_ENETVLAN 0x00000100
|
||||
#define BFL_LTECOEX 0x00000200
|
||||
#define BFL_NOPCI 0x00000400
|
||||
#define BFL_FEM 0x00000800
|
||||
#define BFL_EXTLNA 0x00001000
|
||||
#define BFL_HGPA 0x00002000
|
||||
#define BFL_BTC2WIRE_ALTGPIO 0x00004000
|
||||
|
||||
#define BFL_ALTIQ 0x00008000
|
||||
#define BFL_NOPA 0x00010000
|
||||
#define BFL_RSSIINV 0x00020000
|
||||
#define BFL_PAREF 0x00040000
|
||||
#define BFL_ALTIQ 0x00008000
|
||||
#define BFL_NOPA 0x00010000
|
||||
#define BFL_RSSIINV 0x00020000
|
||||
#define BFL_PAREF 0x00040000
|
||||
#define BFL_3TSWITCH 0x00080000
|
||||
#define BFL_PHASESHIFT 0x00100000
|
||||
#define BFL_BUCKBOOST 0x00200000
|
||||
#define BFL_FEM_BT 0x00400000
|
||||
#define BFL_RXCHAIN_OFF_BT 0x00400000
|
||||
#define BFL_NOCBUCK 0x00800000
|
||||
#define BFL_CCKFAVOREVM 0x01000000
|
||||
#define BFL_PALDO 0x02000000
|
||||
#define BFL_LNLDO2_2P5 0x04000000
|
||||
#define BFL_BUCKBOOST 0x00200000
|
||||
#define BFL_FEM_BT 0x00400000
|
||||
#define BFL_RXCHAIN_OFF_BT 0x00400000
|
||||
#define BFL_NOCBUCK 0x00800000
|
||||
#define BFL_CCKFAVOREVM 0x01000000
|
||||
#define BFL_PALDO 0x02000000
|
||||
#define BFL_LNLDO2_2P5 0x04000000
|
||||
#define BFL_FASTPWR 0x08000000
|
||||
#define BFL_UCPWRCTL_MININDX 0x08000000
|
||||
#define BFL_EXTLNA_5GHz 0x10000000
|
||||
#define BFL_TRSW_1by2 0x20000000
|
||||
#define BFL_GAINBOOSTA01 0x20000000
|
||||
#define BFL_LO_TRSW_R_5GHz 0x40000000
|
||||
#define BFL_ELNA_GAINDEF 0x80000000
|
||||
#define BFL_EXTLNA_TX 0x20000000
|
||||
#define BFL_EXTLNA_5GHz 0x10000000
|
||||
#define BFL_TRSW_1by2 0x20000000
|
||||
#define BFL_GAINBOOSTA01 0x20000000
|
||||
#define BFL_LO_TRSW_R_5GHz 0x40000000
|
||||
#define BFL_ELNA_GAINDEF 0x80000000
|
||||
#define BFL_EXTLNA_TX 0x20000000
|
||||
|
||||
|
||||
#define BFL2_RXBB_INT_REG_DIS 0x00000001
|
||||
|
@ -447,61 +447,61 @@
|
|||
|
||||
|
||||
#define BFL2_ANAPACTRL_2G 0x00100000
|
||||
#define BFL2_ANAPACTRL_5G 0x00200000
|
||||
#define BFL2_ELNACTRL_TRSW_2G 0x00400000
|
||||
#define BFL2_BT_SHARE_ANT0 0x00800000
|
||||
#define BFL2_BT_SHARE_BM_BIT0 0x00800000
|
||||
#define BFL2_TEMPSENSE_HIGHER 0x01000000
|
||||
#define BFL2_BTC3WIREONLY 0x02000000
|
||||
#define BFL2_PWR_NOMINAL 0x04000000
|
||||
#define BFL2_EXTLNA_PWRSAVE 0x08000000
|
||||
#define BFL2_ANAPACTRL_5G 0x00200000
|
||||
#define BFL2_ELNACTRL_TRSW_2G 0x00400000
|
||||
#define BFL2_BT_SHARE_ANT0 0x00800000
|
||||
#define BFL2_BT_SHARE_BM_BIT0 0x00800000
|
||||
#define BFL2_TEMPSENSE_HIGHER 0x01000000
|
||||
#define BFL2_BTC3WIREONLY 0x02000000
|
||||
#define BFL2_PWR_NOMINAL 0x04000000
|
||||
#define BFL2_EXTLNA_PWRSAVE 0x08000000
|
||||
|
||||
#define BFL2_4313_RADIOREG 0x10000000
|
||||
|
||||
#define BFL2_DYNAMIC_VMID 0x10000000
|
||||
#define BFL2_SDR_EN 0x20000000
|
||||
#define BFL2_LNA1BYPFORTR2G 0x40000000
|
||||
#define BFL2_LNA1BYPFORTR5G 0x80000000
|
||||
|
||||
#define BFL2_DYNAMIC_VMID 0x10000000
|
||||
#define BFL2_SDR_EN 0x20000000
|
||||
#define BFL2_LNA1BYPFORTR2G 0x40000000
|
||||
#define BFL2_LNA1BYPFORTR5G 0x80000000
|
||||
|
||||
|
||||
#define BFL_SROM11_BTCOEX 0x00000001
|
||||
#define BFL_SROM11_WLAN_BT_SH_XTL 0x00000002
|
||||
#define BFL_SROM11_EXTLNA 0x00001000
|
||||
#define BFL_SROM11_EXTLNA_5GHz 0x10000000
|
||||
#define BFL_SROM11_GAINBOOSTA01 0x20000000
|
||||
#define BFL2_SROM11_APLL_WAR 0x00000002
|
||||
#define BFL2_SROM11_ANAPACTRL_2G 0x00100000
|
||||
#define BFL2_SROM11_ANAPACTRL_5G 0x00200000
|
||||
#define BFL_SROM11_BTCOEX 0x00000001
|
||||
#define BFL_SROM11_WLAN_BT_SH_XTL 0x00000002
|
||||
#define BFL_SROM11_EXTLNA 0x00001000
|
||||
#define BFL_SROM11_EXTLNA_5GHz 0x10000000
|
||||
#define BFL_SROM11_GAINBOOSTA01 0x20000000
|
||||
#define BFL2_SROM11_APLL_WAR 0x00000002
|
||||
#define BFL2_SROM11_ANAPACTRL_2G 0x00100000
|
||||
#define BFL2_SROM11_ANAPACTRL_5G 0x00200000
|
||||
|
||||
|
||||
#define BFL3_FEMCTRL_SUB 0x00000007
|
||||
#define BFL3_RCAL_WAR 0x00000008
|
||||
#define BFL3_TXGAINTBLID 0x00000070
|
||||
#define BFL3_TXGAINTBLID_SHIFT 0x4
|
||||
#define BFL3_TSSI_DIV_WAR 0x00000080
|
||||
#define BFL3_TSSI_DIV_WAR_SHIFT 0x7
|
||||
#define BFL3_FEMTBL_FROM_NVRAM 0x00000100
|
||||
#define BFL3_FEMTBL_FROM_NVRAM_SHIFT 0x8
|
||||
#define BFL3_AGC_CFG_2G 0x00000200
|
||||
#define BFL3_AGC_CFG_5G 0x00000400
|
||||
#define BFL3_PPR_BIT_EXT 0x00000800
|
||||
#define BFL3_PPR_BIT_EXT_SHIFT 11
|
||||
#define BFL3_BBPLL_SPR_MODE_DIS 0x00001000
|
||||
#define BFL3_RCAL_OTP_VAL_EN 0x00002000
|
||||
#define BFL3_2GTXGAINTBL_BLANK 0x00004000
|
||||
#define BFL3_2GTXGAINTBL_BLANK_SHIFT 14
|
||||
#define BFL3_5GTXGAINTBL_BLANK 0x00008000
|
||||
#define BFL3_5GTXGAINTBL_BLANK_SHIFT 15
|
||||
#define BFL3_BT_SHARE_BM_BIT1 0x40000000
|
||||
#define BFL3_PHASETRACK_MAX_ALPHABETA 0x00010000
|
||||
#define BFL3_PHASETRACK_MAX_ALPHABETA_SHIFT 16
|
||||
#define BFL3_BT_SHARE_BM_BIT1 0x40000000
|
||||
#define BFL3_EN_NONBRCM_TXBF 0x10000000
|
||||
#define BFL3_EN_P2PLINK_TXBF 0x20000000
|
||||
#define BFL3_FEMCTRL_SUB 0x00000007
|
||||
#define BFL3_RCAL_WAR 0x00000008
|
||||
#define BFL3_TXGAINTBLID 0x00000070
|
||||
#define BFL3_TXGAINTBLID_SHIFT 0x4
|
||||
#define BFL3_TSSI_DIV_WAR 0x00000080
|
||||
#define BFL3_TSSI_DIV_WAR_SHIFT 0x7
|
||||
#define BFL3_FEMTBL_FROM_NVRAM 0x00000100
|
||||
#define BFL3_FEMTBL_FROM_NVRAM_SHIFT 0x8
|
||||
#define BFL3_AGC_CFG_2G 0x00000200
|
||||
#define BFL3_AGC_CFG_5G 0x00000400
|
||||
#define BFL3_PPR_BIT_EXT 0x00000800
|
||||
#define BFL3_PPR_BIT_EXT_SHIFT 11
|
||||
#define BFL3_BBPLL_SPR_MODE_DIS 0x00001000
|
||||
#define BFL3_RCAL_OTP_VAL_EN 0x00002000
|
||||
#define BFL3_2GTXGAINTBL_BLANK 0x00004000
|
||||
#define BFL3_2GTXGAINTBL_BLANK_SHIFT 14
|
||||
#define BFL3_5GTXGAINTBL_BLANK 0x00008000
|
||||
#define BFL3_5GTXGAINTBL_BLANK_SHIFT 15
|
||||
#define BFL3_BT_SHARE_BM_BIT1 0x40000000
|
||||
#define BFL3_PHASETRACK_MAX_ALPHABETA 0x00010000
|
||||
#define BFL3_PHASETRACK_MAX_ALPHABETA_SHIFT 16
|
||||
#define BFL3_BT_SHARE_BM_BIT1 0x40000000
|
||||
#define BFL3_EN_NONBRCM_TXBF 0x10000000
|
||||
#define BFL3_EN_P2PLINK_TXBF 0x20000000
|
||||
|
||||
|
||||
#define BOARD_GPIO_BTC3W_IN 0x850
|
||||
#define BOARD_GPIO_BTC3W_OUT 0x020
|
||||
#define BOARD_GPIO_BTC3W_IN 0x850
|
||||
#define BOARD_GPIO_BTC3W_OUT 0x020
|
||||
#define BOARD_GPIO_BTCMOD_IN 0x010
|
||||
#define BOARD_GPIO_BTCMOD_OUT 0x020
|
||||
#define BOARD_GPIO_BTC_IN 0x080
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Byte order utilities
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* NVRAM variable manipulation
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -115,7 +115,7 @@ uint8 nvram_calc_crc(struct nvram_header * nvh);
|
|||
|
||||
extern int nvram_space;
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#define NVRAM_SOFTWARE_VERSION "1"
|
||||
|
@ -132,7 +132,7 @@ extern int nvram_space;
|
|||
#endif
|
||||
#define MAX_NVRAM_SPACE NVRAM_SPACE
|
||||
#define ROM_ENVRAM_SPACE 0x1000
|
||||
#define NVRAM_LZMA_MAGIC 0x4c5a4d41
|
||||
#define NVRAM_LZMA_MAGIC 0x4c5a4d41
|
||||
|
||||
#define NVRAM_MAX_VALUE_LEN 255
|
||||
#define NVRAM_MAX_PARAM_LEN 64
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom PCI-SPI Host Controller Register Definitions
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Performance counters software interface.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* host controller drivers.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
* abstract OS and BUS specific details of SDIO
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BCMSDH Function Driver for the native SDIO/MMC driver in the Linux Kernel
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* Software-specific definitions shared between device and host side
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* SD-SPI Protocol Conversion - BCMSDH->SPI Translation Layer
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* 'Standard' SDIO HOST CONTROLLER driver
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom SPI Low-Level Hardware Driver API
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
* SD-SPI Protocol Conversion - BCMSDH->gSPI Translation Layer
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
* available at http://www.broadcom.com/licenses/GPLv2.php, with the
|
||||
* following added to such license:
|
||||
*
|
||||
*
|
||||
* As a special exception, the copyright holders of this software give you
|
||||
* permission to link this software with independent modules, and to copy and
|
||||
* distribute the resulting executable under terms of your choice, provided that
|
||||
|
@ -16,7 +16,7 @@
|
|||
* the license of that module. An independent module is a module which is not
|
||||
* derived from this software. The special exception does not apply to any
|
||||
* modifications of the software.
|
||||
*
|
||||
*
|
||||
* Notwithstanding the above, under no circumstances may you combine this
|
||||
* software in any way with any other Broadcom software provided under a license
|
||||
* other than the GPL, without Broadcom's express prior written consent.
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* SROM format definition.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Table that encodes the srom formats for PCI/PCIe NICs.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -69,7 +69,7 @@ static const sromvar_t pci_sromvars[] = {
|
|||
{"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
|
||||
#else
|
||||
{"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
|
||||
#endif
|
||||
#endif
|
||||
{"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
|
||||
{"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
|
||||
{"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff},
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Misc useful os-independent macros and functions.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -119,12 +119,12 @@ typedef struct {
|
|||
uint32 ps_retry;
|
||||
uint32 retry_drop;
|
||||
uint32 max_avail;
|
||||
uint32 max_used;
|
||||
uint32 queue_capacity;
|
||||
uint32 rtsfail;
|
||||
uint32 acked;
|
||||
uint32 max_used;
|
||||
uint32 queue_capacity;
|
||||
uint32 rtsfail;
|
||||
uint32 acked;
|
||||
} pktq_counters_t;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#define PKTQ_COMMON \
|
||||
|
@ -139,9 +139,9 @@ struct pktq {
|
|||
|
||||
struct pktq_prec q[PKTQ_MAX_PREC];
|
||||
#ifdef PKTQ_LOG
|
||||
pktq_counters_t _prec_cnt[PKTQ_MAX_PREC];
|
||||
pktq_counters_t _prec_bytes[PKTQ_MAX_PREC];
|
||||
uint32 _logtime;
|
||||
pktq_counters_t _prec_cnt[PKTQ_MAX_PREC];
|
||||
pktq_counters_t _prec_bytes[PKTQ_MAX_PREC];
|
||||
uint32 _logtime;
|
||||
#endif
|
||||
};
|
||||
|
||||
|
@ -344,10 +344,10 @@ extern uint8 *pktdataoffset(osl_t *osh, void *p, uint offset);
|
|||
extern void *pktoffset(osl_t *osh, void *p, uint offset);
|
||||
|
||||
|
||||
#define PKTPRIO_VDSCP 0x100
|
||||
#define PKTPRIO_VLAN 0x200
|
||||
#define PKTPRIO_VDSCP 0x100
|
||||
#define PKTPRIO_VLAN 0x200
|
||||
#define PKTPRIO_UPD 0x400
|
||||
#define PKTPRIO_DSCP 0x800
|
||||
#define PKTPRIO_DSCP 0x800
|
||||
|
||||
|
||||
|
||||
|
@ -527,12 +527,12 @@ extern int bcm_format_ssid(char* buf, const uchar ssid[], uint ssid_len);
|
|||
#define BCME_TXFAIL -38
|
||||
#define BCME_RXFAIL -39
|
||||
#define BCME_NODEVICE -40
|
||||
#define BCME_NMODE_DISABLED -41
|
||||
#define BCME_NONRESIDENT -42
|
||||
#define BCME_SCANREJECT -43
|
||||
#define BCME_USAGE_ERROR -44
|
||||
#define BCME_IOCTL_ERROR -45
|
||||
#define BCME_SERIAL_PORT_ERR -46
|
||||
#define BCME_NMODE_DISABLED -41
|
||||
#define BCME_NONRESIDENT -42
|
||||
#define BCME_SCANREJECT -43
|
||||
#define BCME_USAGE_ERROR -44
|
||||
#define BCME_IOCTL_ERROR -45
|
||||
#define BCME_SERIAL_PORT_ERR -46
|
||||
#define BCME_LAST BCME_SERIAL_PORT_ERR
|
||||
|
||||
|
||||
|
@ -596,25 +596,25 @@ extern int bcm_format_ssid(char* buf, const uchar ssid[], uint ssid_len);
|
|||
|
||||
#ifndef MAX
|
||||
#define MAX(a, b) (((a) > (b)) ? (a) : (b))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef LIMIT_TO_RANGE
|
||||
#define LIMIT_TO_RANGE(x, min, max) \
|
||||
((x) < (min) ? (min) : ((x) > (max) ? (max) : (x)))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef LIMIT_TO_MAX
|
||||
#define LIMIT_TO_MAX(x, max) \
|
||||
(((x) > (max) ? (max) : (x)))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef LIMIT_TO_MIN
|
||||
#define LIMIT_TO_MIN(x, min) \
|
||||
(((x) < (min) ? (min) : (x)))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define CEIL(x, y) (((x) + ((y) - 1)) / (y))
|
||||
#define ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
|
||||
|
@ -640,7 +640,7 @@ extern int bcm_format_ssid(char* buf, const uchar ssid[], uint ssid_len);
|
|||
#define ARRAYSIZE(a) (sizeof(a) / sizeof(a[0]))
|
||||
#endif
|
||||
|
||||
#ifndef ARRAYLAST
|
||||
#ifndef ARRAYLAST
|
||||
#define ARRAYLAST(a) (&a[ARRAYSIZE(a)-1])
|
||||
#endif
|
||||
|
||||
|
@ -650,9 +650,9 @@ extern void *_bcmutils_dummy_fn;
|
|||
|
||||
|
||||
#ifndef setbit
|
||||
#ifndef NBBY
|
||||
#define NBBY 8
|
||||
#endif
|
||||
#ifndef NBBY
|
||||
#define NBBY 8
|
||||
#endif
|
||||
#ifdef BCMUTILS_BIT_MACROS_USE_FUNCS
|
||||
extern void setbit(void *array, uint bit);
|
||||
extern void clrbit(void *array, uint bit);
|
||||
|
@ -664,7 +664,7 @@ extern bool isclr(const void *array, uint bit);
|
|||
#define isset(a, i) (((const uint8 *)a)[(i) / NBBY] & (1 << ((i) % NBBY)))
|
||||
#define isclr(a, i) ((((const uint8 *)a)[(i) / NBBY] & (1 << ((i) % NBBY))) == 0)
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define isbitset(a, i) (((a) & (1 << (i))) != 0)
|
||||
|
||||
|
@ -724,7 +724,7 @@ extern bool isclr(const void *array, uint bit);
|
|||
#else
|
||||
#define MACDBG "%02x:%02x:%02x"
|
||||
#define MAC2STRDBG(ea) (ea)[0], (ea)[4], (ea)[5]
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
typedef struct bcm_bit_desc {
|
||||
|
@ -813,7 +813,7 @@ extern const char *bcmerrorstr(int bcmerror);
|
|||
|
||||
|
||||
typedef uint32 mbool;
|
||||
#define mboolset(mb, bit) ((mb) |= (bit))
|
||||
#define mboolset(mb, bit) ((mb) |= (bit))
|
||||
#define mboolclr(mb, bit) ((mb) &= ~(bit))
|
||||
#define mboolisset(mb, bit) (((mb) & (bit)) != 0)
|
||||
#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val)))
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* target serial buses like USB, SDIO, SPI, etc.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
* Definitions subject to change without notice.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* HND SiliconBackplane PMU support.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* HNDRTE arm trap handling.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Console support for hndrte.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom HND chip & on-chip-interconnect-related definitions.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Linux OS Independent Layer
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -95,9 +95,9 @@ extern struct pci_dev *osl_pci_device(osl_t *osh);
|
|||
|
||||
typedef struct {
|
||||
bool pkttag;
|
||||
bool mmbus;
|
||||
pktfree_cb_fn_t tx_fn;
|
||||
void *tx_ctx;
|
||||
bool mmbus;
|
||||
pktfree_cb_fn_t tx_fn;
|
||||
void *tx_ctx;
|
||||
void *unused[3];
|
||||
} osl_pubinfo_t;
|
||||
|
||||
|
@ -166,16 +166,16 @@ extern int osl_error(int bcmerror);
|
|||
|
||||
|
||||
#include <linuxver.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 29)
|
||||
#define OSL_SYSUPTIME() ((uint32)jiffies_to_msecs(jiffies))
|
||||
#else
|
||||
#define OSL_SYSUPTIME() ((uint32)jiffies * (1000 / HZ))
|
||||
#endif
|
||||
#endif
|
||||
#define printf(fmt, args...) printk(fmt , ## args)
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
|
||||
#define bcopy(src, dst, len) memcpy((dst), (src), (len))
|
||||
#define bcmp(b1, b2, len) memcmp((b1), (b2), (len))
|
||||
|
@ -268,7 +268,7 @@ extern int osl_error(int bcmerror);
|
|||
#else
|
||||
#define PKTGET_STATIC PKTGET
|
||||
#define PKTFREE_STATIC PKTFREE
|
||||
#endif
|
||||
#endif
|
||||
#define PKTDATA(osh, skb) (((struct sk_buff*)(skb))->data)
|
||||
#define PKTLEN(osh, skb) (((struct sk_buff*)(skb))->len)
|
||||
#define PKTHEADROOM(osh, skb) (PKTDATA(osh, skb)-(((struct sk_buff*)(skb))->head))
|
||||
|
@ -317,7 +317,7 @@ typedef struct ctfpool {
|
|||
#define PKTCLRFAST(osh, skb) ((((struct sk_buff*)(skb))->__unused) &= (~FASTBUF))
|
||||
#define PKTISFAST(osh, skb) ((((struct sk_buff*)(skb))->__unused) & FASTBUF)
|
||||
#define PKTFAST(osh, skb) (((struct sk_buff*)(skb))->__unused)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)
|
||||
#define CTFPOOLPTR(osh, skb) (((struct sk_buff*)(skb))->ctfpool)
|
||||
|
@ -332,11 +332,11 @@ extern void osl_ctfpool_replenish(osl_t *osh, uint thresh);
|
|||
extern int32 osl_ctfpool_init(osl_t *osh, uint numobj, uint size);
|
||||
extern void osl_ctfpool_cleanup(osl_t *osh);
|
||||
extern void osl_ctfpool_stats(osl_t *osh, void *b);
|
||||
#else
|
||||
#else
|
||||
#define PKTSETFAST(osh, skb)
|
||||
#define PKTCLRFAST(osh, skb)
|
||||
#define PKTISFAST(osh, skb) (FALSE)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define PKTSETCTF(osh, skb)
|
||||
#define PKTCLRCTF(osh, skb)
|
||||
|
@ -362,7 +362,7 @@ extern void osl_ctfpool_stats(osl_t *osh, void *b);
|
|||
#define PKTSETCHAINED(osh, skb) (((struct sk_buff*)(skb))->mac_len |= CHAINED)
|
||||
#define PKTCLRCHAINED(osh, skb) (((struct sk_buff*)(skb))->mac_len &= (~CHAINED))
|
||||
#define PKTISCHAINED(skb) (((struct sk_buff*)(skb))->mac_len & CHAINED)
|
||||
#else
|
||||
#else
|
||||
#define SKIPCT (1 << 2)
|
||||
#define CHAINED (1 << 3)
|
||||
#define PKTSETSKIPCT(osh, skb) (((struct sk_buff*)(skb))->__unused |= SKIPCT)
|
||||
|
@ -371,17 +371,17 @@ extern void osl_ctfpool_stats(osl_t *osh, void *b);
|
|||
#define PKTSETCHAINED(osh, skb) (((struct sk_buff*)(skb))->__unused |= CHAINED)
|
||||
#define PKTCLRCHAINED(osh, skb) (((struct sk_buff*)(skb))->__unused &= (~CHAINED))
|
||||
#define PKTISCHAINED(skb) (((struct sk_buff*)(skb))->__unused & CHAINED)
|
||||
#endif
|
||||
#endif
|
||||
typedef struct ctf_mark {
|
||||
uint32 value;
|
||||
} ctf_mark_t;
|
||||
#define CTF_MARK(m) (m.value)
|
||||
#else
|
||||
#else
|
||||
#define PKTSETSKIPCT(osh, skb)
|
||||
#define PKTCLRSKIPCT(osh, skb)
|
||||
#define PKTSKIPCT(osh, skb)
|
||||
#define CTF_MARK(m) 0
|
||||
#endif
|
||||
#endif
|
||||
|
||||
extern void osl_pktfree(osl_t *osh, void *skb, bool send);
|
||||
extern void *osl_pktget_static(osl_t *osh, uint len);
|
||||
|
@ -409,14 +409,14 @@ extern struct sk_buff *osl_pkt_tonative(osl_t *osh, void *pkt);
|
|||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0))
|
||||
#define PKTMARK(p) (((struct sk_buff *)(p))->mark)
|
||||
#define PKTSETMARK(p, m) ((struct sk_buff *)(p))->mark = (m)
|
||||
#else
|
||||
#else
|
||||
#define PKTMARK(p) (((struct sk_buff *)(p))->nfmark)
|
||||
#define PKTSETMARK(p, m) ((struct sk_buff *)(p))->nfmark = (m)
|
||||
#endif
|
||||
#else
|
||||
#endif
|
||||
#else
|
||||
#define PKTMARK(p) 0
|
||||
#define PKTSETMARK(p, m)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define PKTALLOCED(osh) osl_pktalloced(osh)
|
||||
extern uint osl_pktalloced(osl_t *osh);
|
||||
|
@ -477,9 +477,9 @@ do { \
|
|||
(t) = (p); \
|
||||
} \
|
||||
} while (0)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#else
|
||||
#else
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* Pave over some 2.2 versus 2.4 versus 2.6 kernel differences.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -97,7 +97,7 @@
|
|||
#ifndef flush_scheduled_work
|
||||
#define flush_scheduled_work() flush_scheduled_tasks()
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
|
||||
#define DAEMONIZE(a)
|
||||
|
@ -106,14 +106,14 @@
|
|||
#define DAEMONIZE(a) daemonize(a); \
|
||||
allow_signal(SIGKILL); \
|
||||
allow_signal(SIGTERM);
|
||||
#else
|
||||
#else
|
||||
#define RAISE_RX_SOFTIRQ() \
|
||||
cpu_raise_softirq(smp_processor_id(), NET_RX_SOFTIRQ)
|
||||
#define DAEMONIZE(a) daemonize(); \
|
||||
do { if (a) \
|
||||
strncpy(current->comm, a, MIN(sizeof(current->comm), (strlen(a)))); \
|
||||
} while (0);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)
|
||||
#define MY_INIT_WORK(_work, _func) INIT_WORK(_work, _func)
|
||||
|
@ -155,11 +155,11 @@ typedef irqreturn_t(*FN_ISR) (int irq, void *dev_id, struct pt_regs *ptregs);
|
|||
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32)
|
||||
#include <linux/sched.h>
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
|
||||
#include <linux/sched/rt.h>
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)
|
||||
#include <net/lib80211.h>
|
||||
|
@ -474,7 +474,7 @@ pci_restore_state(struct pci_dev *dev, u32 *buffer)
|
|||
#ifndef HAVE_FREE_NETDEV
|
||||
#define free_netdev(dev) kfree(dev)
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0))
|
||||
|
||||
|
@ -493,11 +493,11 @@ pci_restore_state(struct pci_dev *dev, u32 *buffer)
|
|||
#endif
|
||||
|
||||
typedef struct {
|
||||
void *parent;
|
||||
void *parent;
|
||||
char *proc_name;
|
||||
struct task_struct *p_task;
|
||||
long thr_pid;
|
||||
int prio;
|
||||
int prio;
|
||||
struct semaphore sema;
|
||||
int terminated;
|
||||
struct completion completed;
|
||||
|
@ -540,7 +540,7 @@ static inline bool binary_sema_up(tsk_ctl_t *tsk)
|
|||
tsk->up_cnt++;
|
||||
sem_up = TRUE;
|
||||
} else if (tsk->up_cnt == 1) {
|
||||
|
||||
|
||||
} else
|
||||
DBG_THR(("dhd_sched_dpc: unexpected up cnt %d!\n", tsk->up_cnt));
|
||||
|
||||
|
@ -665,18 +665,18 @@ do { \
|
|||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0))
|
||||
#define netdev_priv(dev) dev->priv
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
|
||||
#define RANDOM32 prandom_u32
|
||||
#else
|
||||
#define RANDOM32 random32
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
|
||||
#define SRANDOM32(entropy) prandom_seed(entropy)
|
||||
#else
|
||||
#define SRANDOM32(entropy) srandom32(entropy)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Command line options parser.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Trace messages sent over HBUS
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* OS Abstraction Layer
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -90,7 +90,7 @@ typedef void (*osl_wreg_fn_t)(void *ctx, volatile void *reg, unsigned int val,
|
|||
#define FOREACH_CHAINED_PKT(skb, nskb) \
|
||||
for ((nskb) = NULL; (skb) != NULL; (skb) = (nskb))
|
||||
#define PKTCFREE PKTFREE
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef HNDCTF
|
||||
#define PKTSETCHAINED(osh, skb)
|
||||
|
@ -98,4 +98,4 @@ typedef void (*osl_wreg_fn_t)(void *ctx, volatile void *reg, unsigned int val,
|
|||
#define PKTISCHAINED(skb) (FALSE)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
*
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
*
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* pcicfg.h: PCI configuration constants and structures.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -56,10 +56,10 @@
|
|||
#define PCI_CFG_MINGNT 0x3e
|
||||
#define PCI_CFG_MAXLAT 0x3f
|
||||
#define PCI_CFG_DEVCTRL 0xd8
|
||||
#define PCI_BAR0_WIN 0x80
|
||||
#define PCI_BAR1_WIN 0x84
|
||||
#define PCI_SPROM_CONTROL 0x88
|
||||
#define PCI_BAR1_CONTROL 0x8c
|
||||
#define PCI_BAR0_WIN 0x80
|
||||
#define PCI_BAR1_WIN 0x84
|
||||
#define PCI_SPROM_CONTROL 0x88
|
||||
#define PCI_BAR1_CONTROL 0x8c
|
||||
#define PCI_INT_STATUS 0x90
|
||||
#define PCI_INT_MASK 0x94
|
||||
#define PCI_TO_SB_MB 0x98
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -2,7 +2,7 @@
|
|||
* BT-AMP (BlueTooth Alternate Mac and Phy) 802.11 PAL (Protocol Adaptation Layer)
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* 802.11e protocol header file
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom Ethernettype protocol definitions
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom Event protocol definitions
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -41,7 +41,7 @@
|
|||
|
||||
#include <packed_section_start.h>
|
||||
|
||||
#define BCM_EVENT_MSG_VERSION 2
|
||||
#define BCM_EVENT_MSG_VERSION 2
|
||||
#define BCM_MSG_IFNAME_MAX 16
|
||||
|
||||
|
||||
|
@ -141,23 +141,23 @@ typedef BWL_PRE_PACKED_STRUCT struct bcm_event {
|
|||
#define WLC_E_PSK_SUP 46
|
||||
#define WLC_E_COUNTRY_CODE_CHANGED 47
|
||||
#define WLC_E_EXCEEDED_MEDIUM_TIME 48
|
||||
#define WLC_E_ICV_ERROR 49
|
||||
#define WLC_E_UNICAST_DECODE_ERROR 50
|
||||
#define WLC_E_MULTICAST_DECODE_ERROR 51
|
||||
#define WLC_E_ICV_ERROR 49
|
||||
#define WLC_E_UNICAST_DECODE_ERROR 50
|
||||
#define WLC_E_MULTICAST_DECODE_ERROR 51
|
||||
#define WLC_E_TRACE 52
|
||||
#ifdef WLBTAMP
|
||||
#define WLC_E_BTA_HCI_EVENT 53
|
||||
#define WLC_E_BTA_HCI_EVENT 53
|
||||
#endif
|
||||
#define WLC_E_IF 54
|
||||
#define WLC_E_P2P_DISC_LISTEN_COMPLETE 55
|
||||
#define WLC_E_RSSI 56
|
||||
#define WLC_E_PFN_SCAN_COMPLETE 57
|
||||
#define WLC_E_RSSI 56
|
||||
#define WLC_E_PFN_SCAN_COMPLETE 57
|
||||
|
||||
#define WLC_E_PFN_BEST_BATCHING 57
|
||||
#define WLC_E_EXTLOG_MSG 58
|
||||
#define WLC_E_ACTION_FRAME 59
|
||||
#define WLC_E_ACTION_FRAME_COMPLETE 60
|
||||
#define WLC_E_PRE_ASSOC_IND 61
|
||||
#define WLC_E_ACTION_FRAME 59
|
||||
#define WLC_E_ACTION_FRAME_COMPLETE 60
|
||||
#define WLC_E_PRE_ASSOC_IND 61
|
||||
#define WLC_E_PRE_REASSOC_IND 62
|
||||
#define WLC_E_CHANNEL_ADOPTED 63
|
||||
#define WLC_E_AP_STARTED 64
|
||||
|
@ -168,68 +168,68 @@ typedef BWL_PRE_PACKED_STRUCT struct bcm_event {
|
|||
#define WLC_E_ESCAN_RESULT 69
|
||||
#define WLC_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70
|
||||
#define WLC_E_PROBRESP_MSG 71
|
||||
#define WLC_E_P2P_PROBREQ_MSG 72
|
||||
#define WLC_E_P2P_PROBREQ_MSG 72
|
||||
#define WLC_E_DCS_REQUEST 73
|
||||
#define WLC_E_FIFO_CREDIT_MAP 74
|
||||
#define WLC_E_ACTION_FRAME_RX 75
|
||||
#define WLC_E_WAKE_EVENT 76
|
||||
#define WLC_E_RM_COMPLETE 77
|
||||
#define WLC_E_HTSFSYNC 78
|
||||
#define WLC_E_FIFO_CREDIT_MAP 74
|
||||
#define WLC_E_ACTION_FRAME_RX 75
|
||||
#define WLC_E_WAKE_EVENT 76
|
||||
#define WLC_E_RM_COMPLETE 77
|
||||
#define WLC_E_HTSFSYNC 78
|
||||
#define WLC_E_OVERLAY_REQ 79
|
||||
#define WLC_E_CSA_COMPLETE_IND 80
|
||||
#define WLC_E_EXCESS_PM_WAKE_EVENT 81
|
||||
#define WLC_E_PFN_SCAN_NONE 82
|
||||
#define WLC_E_EXCESS_PM_WAKE_EVENT 81
|
||||
#define WLC_E_PFN_SCAN_NONE 82
|
||||
|
||||
#define WLC_E_PFN_BSSID_NET_FOUND 82
|
||||
#define WLC_E_PFN_SCAN_ALLGONE 83
|
||||
#define WLC_E_PFN_SCAN_ALLGONE 83
|
||||
|
||||
#define WLC_E_PFN_BSSID_NET_LOST 83
|
||||
#define WLC_E_GTK_PLUMBED 84
|
||||
#define WLC_E_ASSOC_IND_NDIS 85
|
||||
#define WLC_E_REASSOC_IND_NDIS 86
|
||||
#define WLC_E_ASSOC_IND_NDIS 85
|
||||
#define WLC_E_REASSOC_IND_NDIS 86
|
||||
#define WLC_E_ASSOC_REQ_IE 87
|
||||
#define WLC_E_ASSOC_RESP_IE 88
|
||||
#define WLC_E_ASSOC_RECREATED 89
|
||||
#define WLC_E_ACTION_FRAME_RX_NDIS 90
|
||||
#define WLC_E_AUTH_REQ 91
|
||||
#define WLC_E_TDLS_PEER_EVENT 92
|
||||
#define WLC_E_SPEEDY_RECREATE_FAIL 93
|
||||
#define WLC_E_NATIVE 94
|
||||
#define WLC_E_PKTDELAY_IND 95
|
||||
#define WLC_E_AWDL_AW 96
|
||||
#define WLC_E_AWDL_ROLE 97
|
||||
#define WLC_E_AWDL_EVENT 98
|
||||
#define WLC_E_ASSOC_RECREATED 89
|
||||
#define WLC_E_ACTION_FRAME_RX_NDIS 90
|
||||
#define WLC_E_AUTH_REQ 91
|
||||
#define WLC_E_TDLS_PEER_EVENT 92
|
||||
#define WLC_E_SPEEDY_RECREATE_FAIL 93
|
||||
#define WLC_E_NATIVE 94
|
||||
#define WLC_E_PKTDELAY_IND 95
|
||||
#define WLC_E_AWDL_AW 96
|
||||
#define WLC_E_AWDL_ROLE 97
|
||||
#define WLC_E_AWDL_EVENT 98
|
||||
#ifdef WLNIC
|
||||
#define WLC_E_NIC_AF_TXS 99
|
||||
#define WLC_E_NIC_NIC_REPORT 100
|
||||
#define WLC_E_NIC_AF_TXS 99
|
||||
#define WLC_E_NIC_NIC_REPORT 100
|
||||
#endif
|
||||
#define WLC_E_BEACON_FRAME_RX 101
|
||||
#define WLC_E_SERVICE_FOUND 102
|
||||
#define WLC_E_GAS_FRAGMENT_RX 103
|
||||
#define WLC_E_GAS_COMPLETE 104
|
||||
#define WLC_E_P2PO_ADD_DEVICE 105
|
||||
#define WLC_E_P2PO_DEL_DEVICE 106
|
||||
#define WLC_E_WNM_STA_SLEEP 107
|
||||
#define WLC_E_NONE 108
|
||||
#define WLC_E_PROXD 109
|
||||
#define WLC_E_IBSS_COALESCE 110
|
||||
#define WLC_E_AIBSS_TXFAIL 110
|
||||
#define WLC_E_AWDL_AW_EXT_END 111
|
||||
#define WLC_E_AWDL_AW_EXT_START 112
|
||||
#define WLC_E_AWDL_AW_START 113
|
||||
#define WLC_E_AWDL_RADIO_OFF 114
|
||||
#define WLC_E_AWDL_PEER_STATE 115
|
||||
#define WLC_E_AWDL_SYNC_STATE_CHANGED 116
|
||||
#define WLC_E_AWDL_CHIP_RESET 117
|
||||
#define WLC_E_SERVICE_FOUND 102
|
||||
#define WLC_E_GAS_FRAGMENT_RX 103
|
||||
#define WLC_E_GAS_COMPLETE 104
|
||||
#define WLC_E_P2PO_ADD_DEVICE 105
|
||||
#define WLC_E_P2PO_DEL_DEVICE 106
|
||||
#define WLC_E_WNM_STA_SLEEP 107
|
||||
#define WLC_E_NONE 108
|
||||
#define WLC_E_PROXD 109
|
||||
#define WLC_E_IBSS_COALESCE 110
|
||||
#define WLC_E_AIBSS_TXFAIL 110
|
||||
#define WLC_E_AWDL_AW_EXT_END 111
|
||||
#define WLC_E_AWDL_AW_EXT_START 112
|
||||
#define WLC_E_AWDL_AW_START 113
|
||||
#define WLC_E_AWDL_RADIO_OFF 114
|
||||
#define WLC_E_AWDL_PEER_STATE 115
|
||||
#define WLC_E_AWDL_SYNC_STATE_CHANGED 116
|
||||
#define WLC_E_AWDL_CHIP_RESET 117
|
||||
#define WLC_E_AWDL_INTERLEAVED_SCAN_START 118
|
||||
#define WLC_E_AWDL_INTERLEAVED_SCAN_STOP 119
|
||||
#define WLC_E_AWDL_PEER_CACHE_CONTROL 120
|
||||
#define WLC_E_CSA_START_IND 121
|
||||
#define WLC_E_CSA_DONE_IND 122
|
||||
#define WLC_E_CSA_FAILURE_IND 123
|
||||
#define WLC_E_CCA_CHAN_QUAL 124
|
||||
#define WLC_E_CCA_CHAN_QUAL 124
|
||||
#define WLC_E_CCX_S69_RESP_RX 129
|
||||
#define WLC_E_LAST 130
|
||||
#define WLC_E_LAST 130
|
||||
|
||||
|
||||
|
||||
|
@ -254,62 +254,62 @@ extern const int bcmevent_names_size;
|
|||
#define WLC_E_STATUS_NEWSCAN 9
|
||||
#define WLC_E_STATUS_NEWASSOC 10
|
||||
#define WLC_E_STATUS_11HQUIET 11
|
||||
#define WLC_E_STATUS_SUPPRESS 12
|
||||
#define WLC_E_STATUS_NOCHANS 13
|
||||
#define WLC_E_STATUS_SUPPRESS 12
|
||||
#define WLC_E_STATUS_NOCHANS 13
|
||||
#ifdef BCMCCX
|
||||
#define WLC_E_STATUS_CCXFASTRM 14
|
||||
#endif
|
||||
#define WLC_E_STATUS_CS_ABORT 15
|
||||
#define WLC_E_STATUS_ERROR 16
|
||||
#define WLC_E_STATUS_CCXFASTRM 14
|
||||
#endif
|
||||
#define WLC_E_STATUS_CS_ABORT 15
|
||||
#define WLC_E_STATUS_ERROR 16
|
||||
|
||||
|
||||
#define WLC_E_REASON_INITIAL_ASSOC 0
|
||||
#define WLC_E_REASON_LOW_RSSI 1
|
||||
#define WLC_E_REASON_DEAUTH 2
|
||||
#define WLC_E_REASON_DISASSOC 3
|
||||
#define WLC_E_REASON_BCNS_LOST 4
|
||||
#define WLC_E_REASON_DISASSOC 3
|
||||
#define WLC_E_REASON_BCNS_LOST 4
|
||||
|
||||
|
||||
#define WLC_E_REASON_FAST_ROAM_FAILED 5
|
||||
#define WLC_E_REASON_DIRECTED_ROAM 6
|
||||
#define WLC_E_REASON_TSPEC_REJECTED 7
|
||||
#define WLC_E_REASON_BETTER_AP 8
|
||||
#define WLC_E_REASON_MINTXRATE 9
|
||||
#define WLC_E_REASON_TXFAIL 10
|
||||
#define WLC_E_REASON_FAST_ROAM_FAILED 5
|
||||
#define WLC_E_REASON_DIRECTED_ROAM 6
|
||||
#define WLC_E_REASON_TSPEC_REJECTED 7
|
||||
#define WLC_E_REASON_BETTER_AP 8
|
||||
#define WLC_E_REASON_MINTXRATE 9
|
||||
#define WLC_E_REASON_TXFAIL 10
|
||||
|
||||
#define WLC_E_REASON_REQUESTED_ROAM 11
|
||||
#define WLC_E_REASON_REQUESTED_ROAM 11
|
||||
|
||||
|
||||
|
||||
#define WLC_E_PRUNE_ENCR_MISMATCH 1
|
||||
#define WLC_E_PRUNE_BCAST_BSSID 2
|
||||
#define WLC_E_PRUNE_MAC_DENY 3
|
||||
#define WLC_E_PRUNE_MAC_NA 4
|
||||
#define WLC_E_PRUNE_ENCR_MISMATCH 1
|
||||
#define WLC_E_PRUNE_BCAST_BSSID 2
|
||||
#define WLC_E_PRUNE_MAC_DENY 3
|
||||
#define WLC_E_PRUNE_MAC_NA 4
|
||||
#define WLC_E_PRUNE_REG_PASSV 5
|
||||
#define WLC_E_PRUNE_SPCT_MGMT 6
|
||||
#define WLC_E_PRUNE_RADAR 7
|
||||
#define WLC_E_RSN_MISMATCH 8
|
||||
#define WLC_E_PRUNE_NO_COMMON_RATES 9
|
||||
#define WLC_E_PRUNE_BASIC_RATES 10
|
||||
#define WLC_E_PRUNE_NO_COMMON_RATES 9
|
||||
#define WLC_E_PRUNE_BASIC_RATES 10
|
||||
#ifdef BCMCCX
|
||||
#define WLC_E_PRUNE_CCXFAST_PREVAP 11
|
||||
#endif
|
||||
#define WLC_E_PRUNE_CIPHER_NA 12
|
||||
#define WLC_E_PRUNE_KNOWN_STA 13
|
||||
#define WLC_E_PRUNE_CCXFAST_PREVAP 11
|
||||
#endif
|
||||
#define WLC_E_PRUNE_CIPHER_NA 12
|
||||
#define WLC_E_PRUNE_KNOWN_STA 13
|
||||
#ifdef BCMCCX
|
||||
#define WLC_E_PRUNE_CCXFAST_DROAM 14
|
||||
#endif
|
||||
#define WLC_E_PRUNE_WDS_PEER 15
|
||||
#define WLC_E_PRUNE_QBSS_LOAD 16
|
||||
#define WLC_E_PRUNE_HOME_AP 17
|
||||
#define WLC_E_PRUNE_CCXFAST_DROAM 14
|
||||
#endif
|
||||
#define WLC_E_PRUNE_WDS_PEER 15
|
||||
#define WLC_E_PRUNE_QBSS_LOAD 16
|
||||
#define WLC_E_PRUNE_HOME_AP 17
|
||||
#ifdef BCMCCX
|
||||
#define WLC_E_PRUNE_AP_BLOCKED 18
|
||||
#define WLC_E_PRUNE_NO_DIAG_SUPPORT 19
|
||||
#endif
|
||||
#define WLC_E_PRUNE_AP_BLOCKED 18
|
||||
#define WLC_E_PRUNE_NO_DIAG_SUPPORT 19
|
||||
#endif
|
||||
|
||||
|
||||
#define WLC_E_SUP_OTHER 0
|
||||
#define WLC_E_SUP_DECRYPT_KEY_DATA 1
|
||||
#define WLC_E_SUP_OTHER 0
|
||||
#define WLC_E_SUP_DECRYPT_KEY_DATA 1
|
||||
#define WLC_E_SUP_BAD_UCAST_WEP128 2
|
||||
#define WLC_E_SUP_BAD_UCAST_WEP40 3
|
||||
#define WLC_E_SUP_UNSUP_KEY_LEN 4
|
||||
|
@ -328,8 +328,8 @@ extern const int bcmevent_names_size;
|
|||
|
||||
|
||||
#ifdef WLAWDL
|
||||
#define WLC_E_AWDL_SCAN_START 1
|
||||
#define WLC_E_AWDL_SCAN_DONE 0
|
||||
#define WLC_E_AWDL_SCAN_START 1
|
||||
#define WLC_E_AWDL_SCAN_DONE 0
|
||||
|
||||
#define WLC_E_AWDL_RX_ACT_FRAME 1
|
||||
#define WLC_E_AWDL_RX_PRB_RESP 2
|
||||
|
@ -337,7 +337,7 @@ extern const int bcmevent_names_size;
|
|||
#endif
|
||||
typedef BWL_PRE_PACKED_STRUCT struct wl_event_rx_frame_data {
|
||||
uint16 version;
|
||||
uint16 channel;
|
||||
uint16 channel;
|
||||
int32 rssi;
|
||||
uint32 mactime;
|
||||
uint32 rate;
|
||||
|
@ -347,11 +347,11 @@ typedef BWL_PRE_PACKED_STRUCT struct wl_event_rx_frame_data {
|
|||
|
||||
|
||||
typedef struct wl_event_data_if {
|
||||
uint8 ifidx;
|
||||
uint8 opcode;
|
||||
uint8 reserved;
|
||||
uint8 bssidx;
|
||||
uint8 role;
|
||||
uint8 ifidx;
|
||||
uint8 opcode;
|
||||
uint8 reserved;
|
||||
uint8 bssidx;
|
||||
uint8 role;
|
||||
} wl_event_data_if_t;
|
||||
|
||||
|
||||
|
@ -378,13 +378,13 @@ typedef struct wl_event_data_rssi {
|
|||
} wl_event_data_rssi_t;
|
||||
|
||||
|
||||
#define WLC_E_IF_FLAGS_BSSCFG_NOIF 0x1
|
||||
#define WLC_E_IF_FLAGS_BSSCFG_NOIF 0x1
|
||||
|
||||
|
||||
#define WLC_E_LINK_BCN_LOSS 1
|
||||
#define WLC_E_LINK_DISASSOC 2
|
||||
#define WLC_E_LINK_ASSOC_REC 3
|
||||
#define WLC_E_LINK_BSSCFG_DIS 4
|
||||
#define WLC_E_LINK_BCN_LOSS 1
|
||||
#define WLC_E_LINK_DISASSOC 2
|
||||
#define WLC_E_LINK_ASSOC_REC 3
|
||||
#define WLC_E_LINK_BSSCFG_DIS 4
|
||||
|
||||
|
||||
#define WLC_E_OVL_DOWNLOAD 0
|
||||
|
@ -405,50 +405,50 @@ typedef struct wl_event_data_rssi {
|
|||
#define WLC_E_AWDL_OOB_AF_STATUS 5
|
||||
|
||||
|
||||
#define WLC_E_AWDL_SCAN_START 1
|
||||
#define WLC_E_AWDL_SCAN_DONE 0
|
||||
#define WLC_E_AWDL_PHYCAL_START 1
|
||||
#define WLC_E_AWDL_PHYCAL_DONE 0
|
||||
#define WLC_E_AWDL_SCAN_START 1
|
||||
#define WLC_E_AWDL_SCAN_DONE 0
|
||||
#define WLC_E_AWDL_PHYCAL_START 1
|
||||
#define WLC_E_AWDL_PHYCAL_DONE 0
|
||||
#endif
|
||||
|
||||
|
||||
typedef BWL_PRE_PACKED_STRUCT struct wl_event_gas {
|
||||
uint16 channel;
|
||||
uint8 dialog_token;
|
||||
uint8 fragment_id;
|
||||
uint16 status_code;
|
||||
uint16 data_len;
|
||||
uint8 data[1];
|
||||
uint16 channel;
|
||||
uint8 dialog_token;
|
||||
uint8 fragment_id;
|
||||
uint16 status_code;
|
||||
uint16 data_len;
|
||||
uint8 data[1];
|
||||
} BWL_POST_PACKED_STRUCT wl_event_gas_t;
|
||||
|
||||
|
||||
typedef BWL_PRE_PACKED_STRUCT struct wl_sd_tlv {
|
||||
uint16 length;
|
||||
uint8 protocol;
|
||||
uint8 transaction_id;
|
||||
uint8 status_code;
|
||||
uint8 data[1];
|
||||
uint16 length;
|
||||
uint8 protocol;
|
||||
uint8 transaction_id;
|
||||
uint8 status_code;
|
||||
uint8 data[1];
|
||||
} BWL_POST_PACKED_STRUCT wl_sd_tlv_t;
|
||||
|
||||
|
||||
typedef BWL_PRE_PACKED_STRUCT struct wl_event_sd {
|
||||
uint16 channel;
|
||||
uint8 count;
|
||||
wl_sd_tlv_t tlv[1];
|
||||
uint16 channel;
|
||||
uint8 count;
|
||||
wl_sd_tlv_t tlv[1];
|
||||
} BWL_POST_PACKED_STRUCT wl_event_sd_t;
|
||||
|
||||
|
||||
#define WLC_E_PROXD_FOUND 1
|
||||
#define WLC_E_PROXD_GONE 2
|
||||
#define WLC_E_PROXD_FOUND 1
|
||||
#define WLC_E_PROXD_GONE 2
|
||||
|
||||
|
||||
typedef BWL_PRE_PACKED_STRUCT struct awdl_aws_event_data {
|
||||
uint32 fw_time;
|
||||
struct ether_addr current_master;
|
||||
uint16 aw_counter;
|
||||
uint8 aw_ext_count;
|
||||
uint8 aw_role;
|
||||
uint8 flags;
|
||||
uint32 fw_time;
|
||||
struct ether_addr current_master;
|
||||
uint16 aw_counter;
|
||||
uint8 aw_ext_count;
|
||||
uint8 aw_role;
|
||||
uint8 flags;
|
||||
uint16 aw_chan;
|
||||
} BWL_POST_PACKED_STRUCT awdl_aws_event_data_t;
|
||||
|
||||
|
@ -458,4 +458,4 @@ typedef BWL_PRE_PACKED_STRUCT struct awdl_aws_event_data {
|
|||
|
||||
#include <packed_section_end.h>
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -52,20 +52,20 @@
|
|||
#define IP_PROT_ICMP6 0x3a
|
||||
|
||||
|
||||
#define IPV4_VER_HL_OFFSET 0
|
||||
#define IPV4_TOS_OFFSET 1
|
||||
#define IPV4_PKTLEN_OFFSET 2
|
||||
#define IPV4_PKTFLAG_OFFSET 6
|
||||
#define IPV4_PROT_OFFSET 9
|
||||
#define IPV4_CHKSUM_OFFSET 10
|
||||
#define IPV4_SRC_IP_OFFSET 12
|
||||
#define IPV4_DEST_IP_OFFSET 16
|
||||
#define IPV4_OPTIONS_OFFSET 20
|
||||
#define IPV4_MIN_HEADER_LEN 20
|
||||
#define IPV4_VER_HL_OFFSET 0
|
||||
#define IPV4_TOS_OFFSET 1
|
||||
#define IPV4_PKTLEN_OFFSET 2
|
||||
#define IPV4_PKTFLAG_OFFSET 6
|
||||
#define IPV4_PROT_OFFSET 9
|
||||
#define IPV4_CHKSUM_OFFSET 10
|
||||
#define IPV4_SRC_IP_OFFSET 12
|
||||
#define IPV4_DEST_IP_OFFSET 16
|
||||
#define IPV4_OPTIONS_OFFSET 20
|
||||
#define IPV4_MIN_HEADER_LEN 20
|
||||
|
||||
|
||||
#define IPV4_VER_MASK 0xf0
|
||||
#define IPV4_VER_SHIFT 4
|
||||
#define IPV4_VER_MASK 0xf0
|
||||
#define IPV4_VER_SHIFT 4
|
||||
|
||||
#define IPV4_HLEN_MASK 0x0f
|
||||
#define IPV4_HLEN(ipv4_body) (4 * (((uint8 *)(ipv4_body))[IPV4_VER_HL_OFFSET] & IPV4_HLEN_MASK))
|
||||
|
@ -210,4 +210,4 @@ ipv6_exthdr_len(uint8 *h, uint8 *proto)
|
|||
|
||||
#include <packed_section_end.h>
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BT-AMP (BlueTooth Alternate Mac and Phy) HCI (Host/Controller Interface)
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* From FreeBSD 2.2.7: Fundamental constants relating to ethernet.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -24,7 +24,7 @@
|
|||
* $Id: ethernet.h 384540 2013-02-12 04:28:58Z $
|
||||
*/
|
||||
|
||||
#ifndef _NET_ETHERNET_H_
|
||||
#ifndef _NET_ETHERNET_H_
|
||||
#define _NET_ETHERNET_H_
|
||||
|
||||
#ifndef _TYPEDEFS_H_
|
||||
|
@ -65,21 +65,21 @@
|
|||
#define ETHER_TYPE_ARP 0x0806
|
||||
#define ETHER_TYPE_8021Q 0x8100
|
||||
#define ETHER_TYPE_IPV6 0x86dd
|
||||
#define ETHER_TYPE_BRCM 0x886c
|
||||
#define ETHER_TYPE_802_1X 0x888e
|
||||
#define ETHER_TYPE_BRCM 0x886c
|
||||
#define ETHER_TYPE_802_1X 0x888e
|
||||
#ifdef PLC
|
||||
#define ETHER_TYPE_88E1 0x88e1
|
||||
#define ETHER_TYPE_8912 0x8912
|
||||
#define ETHER_TYPE_GIGLED 0xffff
|
||||
#endif
|
||||
#define ETHER_TYPE_802_1X_PREAUTH 0x88c7
|
||||
#define ETHER_TYPE_WAI 0x88b4
|
||||
#define ETHER_TYPE_89_0D 0x890d
|
||||
#define ETHER_TYPE_88E1 0x88e1
|
||||
#define ETHER_TYPE_8912 0x8912
|
||||
#define ETHER_TYPE_GIGLED 0xffff
|
||||
#endif
|
||||
#define ETHER_TYPE_802_1X_PREAUTH 0x88c7
|
||||
#define ETHER_TYPE_WAI 0x88b4
|
||||
#define ETHER_TYPE_89_0D 0x890d
|
||||
|
||||
#define ETHER_TYPE_PPP_SES 0x8864
|
||||
#define ETHER_TYPE_PPP_SES 0x8864
|
||||
|
||||
|
||||
#define ETHER_BRCM_SUBTYPE_LEN 4
|
||||
#define ETHER_BRCM_SUBTYPE_LEN 4
|
||||
|
||||
|
||||
#define ETHER_DEST_OFFSET (0 * ETHER_ADDR_LEN)
|
||||
|
@ -99,7 +99,7 @@
|
|||
((uint8 *)ea)[5] = ((mgrp_ip) >> 0) & 0xff; \
|
||||
}
|
||||
|
||||
#ifndef __INCif_etherh
|
||||
#ifndef __INCif_etherh
|
||||
|
||||
BWL_PRE_PACKED_STRUCT struct ether_header {
|
||||
uint8 ether_dhost[ETHER_ADDR_LEN];
|
||||
|
@ -187,4 +187,4 @@ do { \
|
|||
|
||||
#include <packed_section_end.h>
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -374,9 +374,9 @@ typedef struct wifi_p2p_pub_act_frame wifi_p2p_pub_act_frame_t;
|
|||
#define P2P_PAF_INVITE_RSP 4
|
||||
#define P2P_PAF_DEVDIS_REQ 5
|
||||
#define P2P_PAF_DEVDIS_RSP 6
|
||||
#define P2P_PAF_PROVDIS_REQ 7
|
||||
#define P2P_PAF_PROVDIS_RSP 8
|
||||
#define P2P_PAF_SUBTYPE_INVALID 255
|
||||
#define P2P_PAF_PROVDIS_REQ 7
|
||||
#define P2P_PAF_PROVDIS_RSP 8
|
||||
#define P2P_PAF_SUBTYPE_INVALID 255
|
||||
|
||||
|
||||
#define P2P_TYPE_MNREQ P2P_PAF_GON_REQ
|
||||
|
@ -403,12 +403,12 @@ typedef struct wifi_p2p_noa_se wifi_p2p_noa_se_t;
|
|||
|
||||
#define P2P_NOA_SE_FIXED_LEN 5
|
||||
|
||||
#define P2P_NOA_SE_MAX_DESC 2
|
||||
#define P2P_NOA_SE_MAX_DESC 2
|
||||
|
||||
|
||||
#define P2P_NOA_DESC_CNT_RESERVED 0
|
||||
#define P2P_NOA_DESC_CNT_REPEAT 255
|
||||
#define P2P_NOA_DESC_TYPE_PREFERRED 1
|
||||
#define P2P_NOA_DESC_CNT_RESERVED 0
|
||||
#define P2P_NOA_DESC_CNT_REPEAT 255
|
||||
#define P2P_NOA_DESC_TYPE_PREFERRED 1
|
||||
#define P2P_NOA_DESC_TYPE_ACCEPTABLE 2
|
||||
|
||||
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* SD-SPI Protocol Standard
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* 802.1Q VLAN protocol definitions
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -35,46 +35,46 @@
|
|||
#include <packed_section_start.h>
|
||||
|
||||
#ifndef VLAN_VID_MASK
|
||||
#define VLAN_VID_MASK 0xfff
|
||||
#define VLAN_VID_MASK 0xfff
|
||||
#endif
|
||||
|
||||
#define VLAN_CFI_SHIFT 12
|
||||
#define VLAN_PRI_SHIFT 13
|
||||
#define VLAN_CFI_SHIFT 12
|
||||
#define VLAN_PRI_SHIFT 13
|
||||
|
||||
#define VLAN_PRI_MASK 7
|
||||
#define VLAN_PRI_MASK 7
|
||||
|
||||
#define VLAN_TPID_OFFSET 12
|
||||
#define VLAN_TCI_OFFSET 14
|
||||
#define VLAN_TPID_OFFSET 12
|
||||
#define VLAN_TCI_OFFSET 14
|
||||
|
||||
#define VLAN_TAG_LEN 4
|
||||
#define VLAN_TAG_OFFSET (2 * ETHER_ADDR_LEN)
|
||||
#define VLAN_TAG_OFFSET (2 * ETHER_ADDR_LEN)
|
||||
|
||||
#define VLAN_TPID 0x8100
|
||||
#define VLAN_TPID 0x8100
|
||||
|
||||
struct vlan_header {
|
||||
uint16 vlan_type;
|
||||
uint16 vlan_tag;
|
||||
uint16 vlan_type;
|
||||
uint16 vlan_tag;
|
||||
};
|
||||
|
||||
struct ethervlan_header {
|
||||
uint8 ether_dhost[ETHER_ADDR_LEN];
|
||||
uint8 ether_shost[ETHER_ADDR_LEN];
|
||||
uint16 vlan_type;
|
||||
uint16 vlan_type;
|
||||
uint16 vlan_tag;
|
||||
uint16 ether_type;
|
||||
};
|
||||
|
||||
struct dot3_mac_llc_snapvlan_header {
|
||||
uint8 ether_dhost[ETHER_ADDR_LEN];
|
||||
uint8 ether_shost[ETHER_ADDR_LEN];
|
||||
uint16 length;
|
||||
uint8 dsap;
|
||||
uint8 ssap;
|
||||
uint8 ctl;
|
||||
uint8 oui[3];
|
||||
uint16 vlan_type;
|
||||
uint16 vlan_tag;
|
||||
uint16 ether_type;
|
||||
uint8 ether_dhost[ETHER_ADDR_LEN];
|
||||
uint8 ether_shost[ETHER_ADDR_LEN];
|
||||
uint16 length;
|
||||
uint8 dsap;
|
||||
uint8 ssap;
|
||||
uint8 ctl;
|
||||
uint8 oui[3];
|
||||
uint16 vlan_type;
|
||||
uint16 vlan_tag;
|
||||
uint16 ether_type;
|
||||
};
|
||||
|
||||
#define ETHERVLAN_HDR_LEN (ETHER_HDR_LEN + VLAN_TAG_LEN)
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Fundamental types and constants relating to WPA
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -113,12 +113,12 @@ typedef BWL_PRE_PACKED_STRUCT struct
|
|||
#define WPA_CIPHER_AES_OCB 3
|
||||
#define WPA_CIPHER_AES_CCM 4
|
||||
#define WPA_CIPHER_WEP_104 5
|
||||
#define WPA_CIPHER_BIP 6
|
||||
#define WPA_CIPHER_TPK 7
|
||||
#define WPA_CIPHER_BIP 6
|
||||
#define WPA_CIPHER_TPK 7
|
||||
#ifdef BCMCCX
|
||||
#define WPA_CIPHER_CKIP 8
|
||||
#define WPA_CIPHER_CKIP_MMH 9
|
||||
#define WPA_CIPHER_WEP_MMH 10
|
||||
#define WPA_CIPHER_CKIP 8
|
||||
#define WPA_CIPHER_CKIP_MMH 9
|
||||
#define WPA_CIPHER_WEP_MMH 10
|
||||
|
||||
#define IS_CCX_CIPHER(cipher) ((cipher) == WPA_CIPHER_CKIP || \
|
||||
(cipher) == WPA_CIPHER_CKIP_MMH || \
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* WPS IE definitions
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -8,7 +8,7 @@
|
|||
* $Id: sbchipc.h 385540 2013-02-15 23:14:50Z $
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -287,17 +287,17 @@ typedef volatile struct {
|
|||
uint32 regcontrol_data;
|
||||
uint32 pllcontrol_addr;
|
||||
uint32 pllcontrol_data;
|
||||
uint32 pmustrapopt;
|
||||
uint32 pmu_xtalfreq;
|
||||
uint32 retention_ctl;
|
||||
uint32 pmustrapopt;
|
||||
uint32 pmu_xtalfreq;
|
||||
uint32 retention_ctl;
|
||||
uint32 PAD[3];
|
||||
uint32 retention_grpidx;
|
||||
uint32 retention_grpctl;
|
||||
uint32 retention_grpidx;
|
||||
uint32 retention_grpctl;
|
||||
uint32 PAD[94];
|
||||
uint16 sromotp[512];
|
||||
uint16 sromotp[512];
|
||||
#ifdef NFLASH_SUPPORT
|
||||
|
||||
uint32 nand_revision;
|
||||
|
||||
uint32 nand_revision;
|
||||
uint32 nand_cmd_start;
|
||||
uint32 nand_cmd_addr_x;
|
||||
uint32 nand_cmd_addr;
|
||||
|
@ -358,61 +358,61 @@ typedef volatile struct {
|
|||
uint32 nand_cache_data;
|
||||
uint32 nand_ctrl_config;
|
||||
uint32 nand_ctrl_status;
|
||||
#endif
|
||||
uint32 gci_corecaps0;
|
||||
#endif
|
||||
uint32 gci_corecaps0;
|
||||
uint32 gci_corecaps1;
|
||||
uint32 gci_corecaps2;
|
||||
uint32 gci_corectrl;
|
||||
uint32 gci_corestat;
|
||||
uint32 gci_intstat;
|
||||
uint32 gci_intmask;
|
||||
uint32 gci_wakemask;
|
||||
uint32 gci_levelintstat;
|
||||
uint32 gci_eventintstat;
|
||||
uint32 gci_corestat;
|
||||
uint32 gci_intstat;
|
||||
uint32 gci_intmask;
|
||||
uint32 gci_wakemask;
|
||||
uint32 gci_levelintstat;
|
||||
uint32 gci_eventintstat;
|
||||
uint32 PAD[6];
|
||||
uint32 gci_indirect_addr;
|
||||
uint32 gci_gpioctl;
|
||||
uint32 gci_indirect_addr;
|
||||
uint32 gci_gpioctl;
|
||||
uint32 PAD;
|
||||
uint32 gci_gpiomask;
|
||||
uint32 gci_gpiomask;
|
||||
uint32 PAD;
|
||||
uint32 gci_miscctl;
|
||||
uint32 gci_miscctl;
|
||||
uint32 PAD[2];
|
||||
uint32 gci_input[32];
|
||||
uint32 gci_event[32];
|
||||
uint32 gci_output[4];
|
||||
uint32 gci_control_0;
|
||||
uint32 gci_control_1;
|
||||
uint32 gci_level_polreg;
|
||||
uint32 gci_levelintmask;
|
||||
uint32 gci_eventintmask;
|
||||
uint32 gci_input[32];
|
||||
uint32 gci_event[32];
|
||||
uint32 gci_output[4];
|
||||
uint32 gci_control_0;
|
||||
uint32 gci_control_1;
|
||||
uint32 gci_level_polreg;
|
||||
uint32 gci_levelintmask;
|
||||
uint32 gci_eventintmask;
|
||||
uint32 PAD[3];
|
||||
uint32 gci_inbandlevelintmask;
|
||||
uint32 gci_inbandeventintmask;
|
||||
uint32 gci_inbandlevelintmask;
|
||||
uint32 gci_inbandeventintmask;
|
||||
uint32 PAD[2];
|
||||
uint32 gci_seciauxtx;
|
||||
uint32 gci_seciauxrx;
|
||||
uint32 gci_secitx_datatag;
|
||||
uint32 gci_secirx_datatag;
|
||||
uint32 gci_secitx_datamask;
|
||||
uint32 gci_seciusef0tx_reg;
|
||||
uint32 gci_secif0tx_offset;
|
||||
uint32 gci_secif0rx_offset;
|
||||
uint32 gci_secif1tx_offset;
|
||||
uint32 gci_seciauxtx;
|
||||
uint32 gci_seciauxrx;
|
||||
uint32 gci_secitx_datatag;
|
||||
uint32 gci_secirx_datatag;
|
||||
uint32 gci_secitx_datamask;
|
||||
uint32 gci_seciusef0tx_reg;
|
||||
uint32 gci_secif0tx_offset;
|
||||
uint32 gci_secif0rx_offset;
|
||||
uint32 gci_secif1tx_offset;
|
||||
uint32 PAD[3];
|
||||
uint32 gci_uartescval;
|
||||
uint32 gci_uartescval;
|
||||
uint32 PAD[3];
|
||||
uint32 gci_secibauddiv;
|
||||
uint32 gci_secifcr;
|
||||
uint32 gci_secilcr;
|
||||
uint32 gci_secimcr;
|
||||
uint32 gci_secibauddiv;
|
||||
uint32 gci_secifcr;
|
||||
uint32 gci_secilcr;
|
||||
uint32 gci_secimcr;
|
||||
uint32 PAD[2];
|
||||
uint32 gci_baudadj;
|
||||
uint32 gci_baudadj;
|
||||
uint32 PAD;
|
||||
uint32 gci_chipctrl;
|
||||
uint32 gci_chipsts;
|
||||
uint32 gci_chipctrl;
|
||||
uint32 gci_chipsts;
|
||||
} chipcregs_t;
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#define CC_CHIPID 0
|
||||
|
@ -455,7 +455,7 @@ typedef volatile struct {
|
|||
#define PMU_REG_CONTROL_DATA 0x65C
|
||||
#define PMU_PLL_CONTROL_ADDR 0x660
|
||||
#define PMU_PLL_CONTROL_DATA 0x664
|
||||
#define CC_SROM_OTP 0x800
|
||||
#define CC_SROM_OTP 0x800
|
||||
#define CC_GCI_INDIRECT_ADDR_REG 0xC40
|
||||
#define CC_GCI_CHIP_CTRL_REG 0xE00
|
||||
#define CC_GCI_CC_OFFSET_2 2
|
||||
|
@ -515,16 +515,16 @@ typedef volatile struct {
|
|||
#define CC_CAP2_GSIO 0x00000002
|
||||
|
||||
|
||||
#define CC_CAP_EXT_SECI_PRESENT 0x00000001
|
||||
#define CC_CAP_EXT_GCI_PRESENT 0x00000004
|
||||
#define CC_CAP_EXT_SECI_PRESENT 0x00000001
|
||||
#define CC_CAP_EXT_GCI_PRESENT 0x00000004
|
||||
|
||||
|
||||
#define GCI_WL_CHN_INFO_MASK (0xFF00)
|
||||
|
||||
#define PLL_NONE 0x00000000
|
||||
#define PLL_TYPE1 0x00010000
|
||||
#define PLL_TYPE2 0x00020000
|
||||
#define PLL_TYPE3 0x00030000
|
||||
#define PLL_TYPE1 0x00010000
|
||||
#define PLL_TYPE2 0x00020000
|
||||
#define PLL_TYPE3 0x00030000
|
||||
#define PLL_TYPE4 0x00008000
|
||||
#define PLL_TYPE5 0x00018000
|
||||
#define PLL_TYPE6 0x00028000
|
||||
|
@ -556,7 +556,7 @@ typedef volatile struct {
|
|||
#define NS_FAST_MEM_CLOCK 800000000
|
||||
#define NS_MEM_CLOCK 533000000
|
||||
#define NS_SLOW_MEM_CLOCK 400000000
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#define HT_CLOCK 80000000
|
||||
|
@ -967,13 +967,13 @@ typedef volatile struct {
|
|||
#define SFLASH_ST 0x100
|
||||
#define SFLASH_AT 0x200
|
||||
#define NFLASH 0x300
|
||||
#define PFLASH 0x700
|
||||
#define PFLASH 0x700
|
||||
#define QSPIFLASH_ST 0x800
|
||||
#define QSPIFLASH_AT 0x900
|
||||
|
||||
|
||||
#define CC_CFG_EN 0x0001
|
||||
#define CC_CFG_EM_MASK 0x000e
|
||||
#define CC_CFG_EN 0x0001
|
||||
#define CC_CFG_EM_MASK 0x000e
|
||||
#define CC_CFG_EM_ASYNC 0x0000
|
||||
#define CC_CFG_EM_SYNC 0x0002
|
||||
#define CC_CFG_EM_PCMCIA 0x0004
|
||||
|
@ -1161,7 +1161,7 @@ typedef volatile struct {
|
|||
|
||||
|
||||
#define PMU_CHIPCTL0 0
|
||||
#define PMU43143_CC0_SDIO_DRSTR_OVR (1 << 31)
|
||||
#define PMU43143_CC0_SDIO_DRSTR_OVR (1 << 31)
|
||||
|
||||
|
||||
#define PMU_CC1_CLKREQ_TYPE_SHIFT 19
|
||||
|
@ -1584,14 +1584,14 @@ typedef volatile struct {
|
|||
#define CCTRL43217_EXTPA_C1 (1<<8)
|
||||
|
||||
|
||||
#define CCTRL43228_EXTPA_C0 (1<<14)
|
||||
#define CCTRL43228_EXTPA_C1 (1<<9)
|
||||
#define CCTRL43228_EXTPA_C0 (1<<14)
|
||||
#define CCTRL43228_EXTPA_C1 (1<<9)
|
||||
|
||||
|
||||
#define RES4328_EXT_SWITCHER_PWM 0
|
||||
#define RES4328_BB_SWITCHER_PWM 1
|
||||
#define RES4328_BB_SWITCHER_BURST 2
|
||||
#define RES4328_BB_EXT_SWITCHER_BURST 3
|
||||
#define RES4328_EXT_SWITCHER_PWM 0
|
||||
#define RES4328_BB_SWITCHER_PWM 1
|
||||
#define RES4328_BB_SWITCHER_BURST 2
|
||||
#define RES4328_BB_EXT_SWITCHER_BURST 3
|
||||
#define RES4328_ILP_REQUEST 4
|
||||
#define RES4328_RADIO_SWITCHER_PWM 5
|
||||
#define RES4328_RADIO_SWITCHER_BURST 6
|
||||
|
@ -2133,7 +2133,7 @@ typedef volatile struct {
|
|||
#define PMU_VREG4_LPLDO2_1p15V 1
|
||||
#define PMU_VREG4_LPLDO2_1p20V 2
|
||||
#define PMU_VREG4_LPLDO2_1p10V 3
|
||||
#define PMU_VREG4_LPLDO2_0p90V 4
|
||||
#define PMU_VREG4_LPLDO2_0p90V 4
|
||||
|
||||
#define PMU_VREG4_HSICLDO_BYPASS_SHIFT 27
|
||||
#define PMU_VREG4_HSICLDO_BYPASS_MASK 0x1
|
||||
|
@ -2216,59 +2216,59 @@ typedef volatile struct {
|
|||
#define CCTRL43341_BT_ISO_SEL (1 << 16)
|
||||
|
||||
|
||||
#define CCTRL1_4334_GPIO_SEL (1 << 0)
|
||||
#define CCTRL1_4334_ERCX_SEL (1 << 1)
|
||||
#define CCTRL1_4334_SDIO_HOST_WAKE (1 << 2)
|
||||
#define CCTRL1_4334_JTAG_DISABLE (1 << 3)
|
||||
#define CCTRL1_4334_UART_ON_4_5 (1 << 28)
|
||||
#define CCTRL1_4334_GPIO_SEL (1 << 0)
|
||||
#define CCTRL1_4334_ERCX_SEL (1 << 1)
|
||||
#define CCTRL1_4334_SDIO_HOST_WAKE (1 << 2)
|
||||
#define CCTRL1_4334_JTAG_DISABLE (1 << 3)
|
||||
#define CCTRL1_4334_UART_ON_4_5 (1 << 28)
|
||||
|
||||
|
||||
#define CCTRL1_4324_GPIO_SEL (1 << 0)
|
||||
#define CCTRL1_4324_SDIO_HOST_WAKE (1 << 2)
|
||||
#define CCTRL1_4324_GPIO_SEL (1 << 0)
|
||||
#define CCTRL1_4324_SDIO_HOST_WAKE (1 << 2)
|
||||
|
||||
|
||||
|
||||
#define CST43143_REMAP_TO_ROM (3 << 0)
|
||||
#define CST43143_SDIO_EN (1 << 2)
|
||||
#define CST43143_SDIO_ISO (1 << 3)
|
||||
#define CST43143_USB_CPU_LESS (1 << 4)
|
||||
#define CST43143_CBUCK_MODE (3 << 6)
|
||||
#define CST43143_POK_CBUCK (1 << 8)
|
||||
#define CST43143_REMAP_TO_ROM (3 << 0)
|
||||
#define CST43143_SDIO_EN (1 << 2)
|
||||
#define CST43143_SDIO_ISO (1 << 3)
|
||||
#define CST43143_USB_CPU_LESS (1 << 4)
|
||||
#define CST43143_CBUCK_MODE (3 << 6)
|
||||
#define CST43143_POK_CBUCK (1 << 8)
|
||||
#define CST43143_PMU_OVRSPIKE (1 << 9)
|
||||
#define CST43143_PMU_OVRTEMP (0xF << 10)
|
||||
#define CST43143_SR_FLL_CAL_DONE (1 << 14)
|
||||
#define CST43143_USB_PLL_LOCKDET (1 << 15)
|
||||
#define CST43143_PMU_PLL_LOCKDET (1 << 16)
|
||||
#define CST43143_CHIPMODE_SDIOD(cs) (((cs) & CST43143_SDIO_EN) != 0)
|
||||
#define CST43143_CHIPMODE_SDIOD(cs) (((cs) & CST43143_SDIO_EN) != 0)
|
||||
|
||||
|
||||
|
||||
#define CCTRL_43143_SECI (1<<0)
|
||||
#define CCTRL_43143_BT_LEGACY (1<<1)
|
||||
#define CCTRL_43143_I2S_MODE (1<<2)
|
||||
#define CCTRL_43143_I2S_MASTER (1<<3)
|
||||
#define CCTRL_43143_I2S_FULL (1<<4)
|
||||
#define CCTRL_43143_GSIO (1<<5)
|
||||
#define CCTRL_43143_RF_SWCTRL_MASK (7<<6)
|
||||
#define CCTRL_43143_I2S_MODE (1<<2)
|
||||
#define CCTRL_43143_I2S_MASTER (1<<3)
|
||||
#define CCTRL_43143_I2S_FULL (1<<4)
|
||||
#define CCTRL_43143_GSIO (1<<5)
|
||||
#define CCTRL_43143_RF_SWCTRL_MASK (7<<6)
|
||||
#define CCTRL_43143_RF_SWCTRL_0 (1<<6)
|
||||
#define CCTRL_43143_RF_SWCTRL_1 (2<<6)
|
||||
#define CCTRL_43143_RF_SWCTRL_2 (4<<6)
|
||||
#define CCTRL_43143_RF_XSWCTRL (1<<9)
|
||||
#define CCTRL_43143_HOST_WAKE0 (1<<11)
|
||||
#define CCTRL_43143_HOST_WAKE1 (1<<12)
|
||||
#define CCTRL_43143_RF_XSWCTRL (1<<9)
|
||||
#define CCTRL_43143_HOST_WAKE0 (1<<11)
|
||||
#define CCTRL_43143_HOST_WAKE1 (1<<12)
|
||||
|
||||
|
||||
#define RES43143_EXT_SWITCHER_PWM 0
|
||||
#define RES43143_XTAL_PU 1
|
||||
#define RES43143_ILP_REQUEST 2
|
||||
#define RES43143_ALP_AVAIL 3
|
||||
#define RES43143_WL_CORE_READY 4
|
||||
#define RES43143_BBPLL_PWRSW_PU 5
|
||||
#define RES43143_HT_AVAIL 6
|
||||
#define RES43143_RADIO_PU 7
|
||||
#define RES43143_MACPHY_CLK_AVAIL 8
|
||||
#define RES43143_OTP_PU 9
|
||||
#define RES43143_LQ_AVAIL 10
|
||||
#define RES43143_EXT_SWITCHER_PWM 0
|
||||
#define RES43143_XTAL_PU 1
|
||||
#define RES43143_ILP_REQUEST 2
|
||||
#define RES43143_ALP_AVAIL 3
|
||||
#define RES43143_WL_CORE_READY 4
|
||||
#define RES43143_BBPLL_PWRSW_PU 5
|
||||
#define RES43143_HT_AVAIL 6
|
||||
#define RES43143_RADIO_PU 7
|
||||
#define RES43143_MACPHY_CLK_AVAIL 8
|
||||
#define RES43143_OTP_PU 9
|
||||
#define RES43143_LQ_AVAIL 10
|
||||
|
||||
#define PMU43143_XTAL_CORE_SIZE_MASK 0x3F
|
||||
|
||||
|
@ -2462,14 +2462,14 @@ typedef volatile struct {
|
|||
#define CST4335_RES_INIT_MODE_SHIFT 7
|
||||
#define CST4335_RES_INIT_MODE_MASK 0x00000180
|
||||
#define CST4335_CHIPMODE_MASK 0xF
|
||||
#define CST4335_CHIPMODE_SDIOD(cs) (((cs) & (1 << 0)) != 0)
|
||||
#define CST4335_CHIPMODE_GSPI(cs) (((cs) & (1 << 1)) != 0)
|
||||
#define CST4335_CHIPMODE_USB20D(cs) (((cs) & (1 << 2)) != 0)
|
||||
#define CST4335_CHIPMODE_PCIE(cs) (((cs) & (1 << 3)) != 0)
|
||||
#define CST4335_CHIPMODE_SDIOD(cs) (((cs) & (1 << 0)) != 0)
|
||||
#define CST4335_CHIPMODE_GSPI(cs) (((cs) & (1 << 1)) != 0)
|
||||
#define CST4335_CHIPMODE_USB20D(cs) (((cs) & (1 << 2)) != 0)
|
||||
#define CST4335_CHIPMODE_PCIE(cs) (((cs) & (1 << 3)) != 0)
|
||||
|
||||
|
||||
#define CCTRL1_4335_GPIO_SEL (1 << 0)
|
||||
#define CCTRL1_4335_SDIO_HOST_WAKE (1 << 2)
|
||||
#define CCTRL1_4335_GPIO_SEL (1 << 0)
|
||||
#define CCTRL1_4335_SDIO_HOST_WAKE (1 << 2)
|
||||
|
||||
#define CR4_4335_RAM_BASE (0x180000)
|
||||
#define PATCHTBL_SIZE (0x800)
|
||||
|
@ -2770,7 +2770,7 @@ typedef volatile struct {
|
|||
#define MUXENAB4335_UART_MASK (0x0000000f)
|
||||
|
||||
#define MUXENAB4335_UART_SHIFT 0
|
||||
#define MUXENAB4335_HOSTWAKE_MASK (0x000000f0)
|
||||
#define MUXENAB4335_HOSTWAKE_MASK (0x000000f0)
|
||||
#define MUXENAB4335_HOSTWAKE_SHIFT 4
|
||||
#define MUXENAB4335_GETIX(val, name) \
|
||||
((((val) & MUXENAB4335_ ## name ## _MASK) >> MUXENAB4335_ ## name ## _SHIFT) - 1)
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Broadcom SiliconBackplane hardware register definitions.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* This supports the following chips: BCM42xx, 44xx, 47xx .
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
@ -256,10 +256,10 @@ typedef volatile struct {
|
|||
#endif
|
||||
|
||||
|
||||
#define D64_XC_XE 0x00000001
|
||||
#define D64_XC_SE 0x00000002
|
||||
#define D64_XC_LE 0x00000004
|
||||
#define D64_XC_FL 0x00000010
|
||||
#define D64_XC_XE 0x00000001
|
||||
#define D64_XC_SE 0x00000002
|
||||
#define D64_XC_LE 0x00000004
|
||||
#define D64_XC_FL 0x00000010
|
||||
#define D64_XC_MR_MASK 0x000000C0
|
||||
#define D64_XC_MR_SHIFT 6
|
||||
#define D64_XC_PD 0x00000800
|
||||
|
@ -276,20 +276,20 @@ typedef volatile struct {
|
|||
#define D64_XP_LD_MASK 0x00001fff
|
||||
|
||||
|
||||
#define D64_XS0_CD_MASK (di->d64_xs0_cd_mask)
|
||||
#define D64_XS0_XS_MASK 0xf0000000
|
||||
#define D64_XS0_CD_MASK (di->d64_xs0_cd_mask)
|
||||
#define D64_XS0_XS_MASK 0xf0000000
|
||||
#define D64_XS0_XS_SHIFT 28
|
||||
#define D64_XS0_XS_DISABLED 0x00000000
|
||||
#define D64_XS0_XS_ACTIVE 0x10000000
|
||||
#define D64_XS0_XS_DISABLED 0x00000000
|
||||
#define D64_XS0_XS_ACTIVE 0x10000000
|
||||
#define D64_XS0_XS_IDLE 0x20000000
|
||||
#define D64_XS0_XS_STOPPED 0x30000000
|
||||
#define D64_XS0_XS_SUSP 0x40000000
|
||||
#define D64_XS0_XS_SUSP 0x40000000
|
||||
|
||||
#define D64_XS1_AD_MASK (di->d64_xs1_ad_mask)
|
||||
#define D64_XS1_XE_MASK 0xf0000000
|
||||
#define D64_XS1_AD_MASK (di->d64_xs1_ad_mask)
|
||||
#define D64_XS1_XE_MASK 0xf0000000
|
||||
#define D64_XS1_XE_SHIFT 28
|
||||
#define D64_XS1_XE_NOERR 0x00000000
|
||||
#define D64_XS1_XE_DPE 0x10000000
|
||||
#define D64_XS1_XE_NOERR 0x00000000
|
||||
#define D64_XS1_XE_DPE 0x10000000
|
||||
#define D64_XS1_XE_DFU 0x20000000
|
||||
#define D64_XS1_XE_DTE 0x30000000
|
||||
#define D64_XS1_XE_DESRE 0x40000000
|
||||
|
@ -301,12 +301,12 @@ typedef volatile struct {
|
|||
#define D64_RC_RO_SHIFT 1
|
||||
#define D64_RC_FM 0x00000100
|
||||
#define D64_RC_SH 0x00000200
|
||||
#define D64_RC_OC 0x00000400
|
||||
#define D64_RC_PD 0x00000800
|
||||
#define D64_RC_GE 0x00004000
|
||||
#define D64_RC_AE 0x00030000
|
||||
#define D64_RC_OC 0x00000400
|
||||
#define D64_RC_PD 0x00000800
|
||||
#define D64_RC_GE 0x00004000
|
||||
#define D64_RC_AE 0x00030000
|
||||
#define D64_RC_AE_SHIFT 16
|
||||
#define D64_RC_BL_MASK 0x001C0000
|
||||
#define D64_RC_BL_MASK 0x001C0000
|
||||
#define D64_RC_BL_SHIFT 18
|
||||
#define D64_RC_PC_MASK 0x00E00000
|
||||
#define D64_RC_PC_SHIFT 21
|
||||
|
@ -325,11 +325,11 @@ typedef volatile struct {
|
|||
#define D64_RP_LD_MASK 0x00001fff
|
||||
|
||||
|
||||
#define D64_RS0_CD_MASK (di->d64_rs0_cd_mask)
|
||||
#define D64_RS0_RS_MASK 0xf0000000
|
||||
#define D64_RS0_CD_MASK (di->d64_rs0_cd_mask)
|
||||
#define D64_RS0_RS_MASK 0xf0000000
|
||||
#define D64_RS0_RS_SHIFT 28
|
||||
#define D64_RS0_RS_DISABLED 0x00000000
|
||||
#define D64_RS0_RS_ACTIVE 0x10000000
|
||||
#define D64_RS0_RS_DISABLED 0x00000000
|
||||
#define D64_RS0_RS_ACTIVE 0x10000000
|
||||
#define D64_RS0_RS_IDLE 0x20000000
|
||||
#define D64_RS0_RS_STOPPED 0x30000000
|
||||
#define D64_RS0_RS_SUSP 0x40000000
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BCM43XX Sonics SiliconBackplane PCMCIA core hardware definitions.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -5,7 +5,7 @@
|
|||
* SDIO core support 1bit, 4 bit SDIO mode as well as SPI mode.
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* device core support
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* BCM47XX Sonics SiliconBackplane embedded ram core
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* Protocol and standard (common) device definitions
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
* Register map and definitions for the Standard Host Controller
|
||||
*
|
||||
* Copyright (C) 1999-2013, Broadcom Corporation
|
||||
*
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2 (the "GPL"),
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue