Darkangeel_hd
/
lineage_android_kernel_samsung_jf
mirror of https://github.com/Darkangeel-hd/lineage_android_kernel_samsung_jf.git
1
0
Fork 0
Code Issues Releases Wiki Activity

msm: clock-8974: Enable the audio_core_ixfabric_clk in post_init 

To be able to access certain audio core registers, the
audio_core_ixfabric_clk needs to be on. Turn it on in
post_init.

Change-Id: I29ab8a80bb01696f362d97f98f53538c85f29a18
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
This commit is contained in:
Vikram Mulukutla 2012-08-10 01:59:28 -07:00 committed by Sridhar Parasuram
parent fc3c55c659
commit 6c0f1a7cd7
1 changed files with 19 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
arch/arm/mach-msm/clock-8974.c
View File

@ -385,6 +385,7 @@ static void __iomem *virt_bases[N_BASES];
#define GP2_CBCR 0x1940 #define GP2_CBCR 0x1940
#define GP3_CBCR 0x1980 #define GP3_CBCR 0x1980
#define AUDIO_CORE_GDSCR 0x7000 #define AUDIO_CORE_GDSCR 0x7000
#define AUDIO_CORE_IXFABRIC_CBCR 0x1B000
#define AUDIO_CORE_LPAIF_CODEC_SPKR_OSR_CBCR 0xA014 #define AUDIO_CORE_LPAIF_CODEC_SPKR_OSR_CBCR 0xA014
#define AUDIO_CORE_LPAIF_CODEC_SPKR_IBIT_CBCR 0xA018 #define AUDIO_CORE_LPAIF_CODEC_SPKR_IBIT_CBCR 0xA018
#define AUDIO_CORE_LPAIF_CODEC_SPKR_EBIT_CBCR 0xA01C #define AUDIO_CORE_LPAIF_CODEC_SPKR_EBIT_CBCR 0xA01C
@ -4309,6 +4310,17 @@ static struct branch_clk q6ss_ahb_lfabif_clk = {
}, },
}; };
static struct branch_clk audio_core_ixfabric_clk = {
.cbcr_reg = AUDIO_CORE_IXFABRIC_CBCR,
.has_sibling = 1,
.base = &virt_bases[LPASS_BASE],
.c = {
.dbg_name = "audio_core_ixfabric_clk",
.ops = &clk_ops_branch,
CLK_INIT(audio_core_ixfabric_clk.c),
},
};
static struct branch_clk q6ss_xo_clk = { static struct branch_clk q6ss_xo_clk = {
.cbcr_reg = LPASS_Q6SS_XO_CBCR, .cbcr_reg = LPASS_Q6SS_XO_CBCR,
.bcr_reg = LPASS_Q6SS_BCR, .bcr_reg = LPASS_Q6SS_BCR,
@ -4523,6 +4535,7 @@ struct measure_mux_entry measure_mux[] = {
{&q6ss_xo_clk.c, LPASS_BASE, 0x002b}, {&q6ss_xo_clk.c, LPASS_BASE, 0x002b},
{&q6ss_ahb_lfabif_clk.c, LPASS_BASE, 0x001e}, {&q6ss_ahb_lfabif_clk.c, LPASS_BASE, 0x001e},
{&q6ss_ahbm_clk.c, LPASS_BASE, 0x001d}, {&q6ss_ahbm_clk.c, LPASS_BASE, 0x001d},
{&audio_core_ixfabric_clk.c, LPASS_BASE, 0x0059},
{&mss_bus_q6_clk.c, MSS_BASE, 0x003c}, {&mss_bus_q6_clk.c, MSS_BASE, 0x003c},
{&mss_xo_q6_clk.c, MSS_BASE, 0x0007}, {&mss_xo_q6_clk.c, MSS_BASE, 0x0007},
@ -4968,6 +4981,7 @@ static struct clk_lookup msm_clocks_8974[] = {
/* LPASS clocks */ /* LPASS clocks */
CLK_LOOKUP("bus_clk", audio_core_ixfabric_clk.c, ""),
CLK_LOOKUP("core_clk", audio_core_slimbus_core_clk.c, "fe12f000.slim"), CLK_LOOKUP("core_clk", audio_core_slimbus_core_clk.c, "fe12f000.slim"),
CLK_LOOKUP("iface_clk", audio_core_slimbus_lfabif_clk.c, CLK_LOOKUP("iface_clk", audio_core_slimbus_lfabif_clk.c,
"fe12f000.slim"), "fe12f000.slim"),
@ -5336,6 +5350,11 @@ static void __init msm8974_clock_post_init(void)
*/ */
clk_prepare_enable(&cxo_a_clk_src.c); clk_prepare_enable(&cxo_a_clk_src.c);
/* TODO: Temporarily enable a clock to allow access to LPASS core
* registers.
*/
clk_prepare_enable(&audio_core_ixfabric_clk.c);
/* /*
* TODO: Temporarily enable NOC configuration AHB clocks. Remove when * TODO: Temporarily enable NOC configuration AHB clocks. Remove when
* the bus driver is ready. * the bus driver is ready.