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ARM: hw_breakpoint: enable HAVE_HW_BREAKPOINT feature flag 

HAVE_HW_BREAKPOINT was disabled temporarily from commit
480a82f597. Issue not seen with the
latest kernel hence re-enable the feature and fix merge issue from
previous kernel upgrade.

Change-Id: Ia6e7e8282c848dd73108e4d951b3375bb7caa63c
Signed-off-by: Jin Hong <jinh@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This commit is contained in:
Jin Hong 2012-09-10 09:37:25 -07:00 committed by Steve Kondik
parent 807ef2cabc
commit 56a23f9b00
4 changed files with 8 additions and 28 deletions
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7
arch/Kconfig
View File

@ -169,13 +169,6 @@ config HAVE_HW_BREAKPOINT
bool
depends on PERF_EVENTS
config HAVE_HW_BRKPT_RESERVED_RW_ACCESS
bool
depends on HAVE_HW_BREAKPOINT
help
Some of the hardware might not have r/w access beyond a certain number
of breakpoint register access.
config HAVE_MIXED_BREAKPOINTS_REGS
bool
depends on HAVE_HW_BREAKPOINT

2
arch/arm/Kconfig
View File

@ -29,7 +29,7 @@ config ARM
select HAVE_PERF_EVENTS
select PERF_USE_VMALLOC
select HAVE_REGS_AND_STACK_ACCESS_API
#select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
select HAVE_C_RECORDMCOUNT
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW

25
arch/arm/kernel/hw_breakpoint.c
View File

@ -865,18 +865,6 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
return ret;
}
static void reset_brps_reserved_reg(int n)
{
int i;
/* we must also reset any reserved registers. */
for (i = 0; i < n; ++i) {
write_wb_reg(ARM_BASE_BCR + i, 0UL);
write_wb_reg(ARM_BASE_BVR + i, 0UL);
}
}
/*
* One-time initialisation.
*/
@ -903,7 +891,7 @@ static struct undef_hook debug_reg_hook = {
static void reset_ctrl_regs(void *unused)
{
int i, err = 0, cpu = smp_processor_id();
int i, raw_num_brps, err = 0, cpu = smp_processor_id();
u32 dbg_power;
/*
@ -962,11 +950,12 @@ reset_regs:
if (halting_mode_enabled())
return;
#ifdef CONFIG_HAVE_HW_BRKPT_RESERVED_RW_ACCESS
reset_brps_reserved_reg(core_num_brps);
#else
reset_brps_reserved_reg(core_num_brps + core_num_reserved_brps);
#endif
/* We must also reset any reserved registers. */
raw_num_brps = get_num_brp_resources();
for (i = 0; i < raw_num_brps; ++i) {
write_wb_reg(ARM_BASE_BCR + i, 0UL);
write_wb_reg(ARM_BASE_BVR + i, 0UL);
}
for (i = 0; i < core_num_wrps; ++i) {
write_wb_reg(ARM_BASE_WCR + i, 0UL);

2
arch/arm/mach-msm/Kconfig
View File

@ -419,7 +419,6 @@ config ARCH_MSM_KRAITMP
select MSM_SMP
select HAVE_ARCH_HAS_CURRENT_TIMER
bool
select HAVE_HW_BRKPT_RESERVED_RW_ACCESS
config ARCH_MSM_CORTEXMP
select MSM_SMP
@ -430,7 +429,6 @@ config MSM_KRAIT_WFE_FIXUP
config ARCH_MSM_CORTEX_A5
bool
select HAVE_HW_BRKPT_RESERVED_RW_ACCESS
config ARCH_MSM7X27A
bool