Darkangeel_hd
/
lineage_android_kernel_samsung_jf
mirror of https://github.com/Darkangeel-hd/lineage_android_kernel_samsung_jf.git
1
0
Fork 0
Code Issues Releases Wiki Activity

msm: acpuclock-8064: Lower max L2 speed to 1134MHz 

There are some testing showing that L2 at 1188MHz may cause
some stability issue. Lower the max speed to 1134Mhz until
the root cause is found.

Change-Id: I327c33c72ea0327e269d7839fadfb25ac715408b
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
This commit is contained in:
Tianyi Gou 2013-02-25 19:32:11 -08:00
parent 13dd843c7e
commit 12387de738
1 changed files with 176 additions and 177 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

353
arch/arm/mach-msm/acpuclock-8064.c
View File

@ -131,7 +131,6 @@ static struct l2_level l2_freq_tbl[] __initdata = {
[12] = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1150000, 5 },
[13] = { { 1080000, HFPLL, 1, 0x28 }, 1150000, 1150000, 5 },
[14] = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 5 },
[15] = { { 1188000, HFPLL, 1, 0x2C }, 1150000, 1150000, 5 },
{ }
};
@ -149,15 +148,15 @@ static struct acpu_level tbl_slow[] __initdata = {
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 1100000 },
{ 0, { 972000, HFPLL, 1, 0x24 }, L2(5), 1125000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1125000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1175000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1200000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1200000 },
{ 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1225000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1225000 },
{ 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1237500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1237500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1250000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(14), 1175000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1175000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(14), 1200000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1200000 },
{ 0, { 1296000, HFPLL, 1, 0x30 }, L2(14), 1225000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1225000 },
{ 0, { 1404000, HFPLL, 1, 0x34 }, L2(14), 1237500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1237500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1250000 },
{ 0, { 0 } }
};
@ -175,15 +174,15 @@ static struct acpu_level tbl_nom[] __initdata = {
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 1050000 },
{ 0, { 972000, HFPLL, 1, 0x24 }, L2(5), 1075000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1075000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1125000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1125000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1150000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1150000 },
{ 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1175000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1175000 },
{ 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1187500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1187500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1200000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(14), 1125000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1125000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(14), 1150000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1150000 },
{ 0, { 1296000, HFPLL, 1, 0x30 }, L2(14), 1175000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1175000 },
{ 0, { 1404000, HFPLL, 1, 0x34 }, L2(14), 1187500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1187500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1200000 },
{ 0, { 0 } }
};
@ -201,15 +200,15 @@ static struct acpu_level tbl_fast[] __initdata = {
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 1000000 },
{ 0, { 972000, HFPLL, 1, 0x24 }, L2(5), 1025000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1025000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1075000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1075000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1100000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1100000 },
{ 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1125000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1125000 },
{ 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1137500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1137500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1150000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(14), 1075000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1075000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(14), 1100000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1100000 },
{ 0, { 1296000, HFPLL, 1, 0x30 }, L2(14), 1125000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1125000 },
{ 0, { 1404000, HFPLL, 1, 0x34 }, L2(14), 1137500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1137500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1150000 },
{ 0, { 0 } }
};
@ -227,15 +226,15 @@ static struct acpu_level tbl_faster[] __initdata = {
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 975000 },
{ 0, { 972000, HFPLL, 1, 0x24 }, L2(5), 1000000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1000000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1050000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1050000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1075000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1075000 },
{ 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1100000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1100000 },
{ 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1112500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1112500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1125000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(14), 1050000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1050000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(14), 1075000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1075000 },
{ 0, { 1296000, HFPLL, 1, 0x30 }, L2(14), 1100000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1100000 },
{ 0, { 1404000, HFPLL, 1, 0x34 }, L2(14), 1112500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1112500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1125000 },
{ 0, { 0 } }
};
@ -247,11 +246,11 @@ static struct acpu_level tbl_PVS0_1512MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 1000000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 1025000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1037500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1075000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1087500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1125000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1150000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1162500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1075000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1087500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1125000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1150000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1162500 },
{ 0, { 0 } }
};
@ -263,11 +262,11 @@ static struct acpu_level tbl_PVS1_1512MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 975000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 1000000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1012500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1037500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1050000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1087500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1112500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1125000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1037500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1050000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1087500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1112500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1125000 },
{ 0, { 0 } }
};
@ -279,11 +278,11 @@ static struct acpu_level tbl_PVS2_1512MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 937500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 950000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 975000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1000000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1012500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1037500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1075000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1087500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1000000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1012500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1037500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1075000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1087500 },
{ 0, { 0 } }
};
@ -295,11 +294,11 @@ static struct acpu_level tbl_PVS3_1512MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 900000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 925000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 950000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 975000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 987500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1000000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1037500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1050000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 975000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 987500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1000000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1037500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1050000 },
{ 0, { 0 } }
};
@ -311,11 +310,11 @@ static struct acpu_level tbl_PVS4_1512MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 950000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 962500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 975000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1000000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1012500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 950000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 962500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 975000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1000000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1012500 },
{ 0, { 0 } }
};
@ -327,11 +326,11 @@ static struct acpu_level tbl_PVS5_1512MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 987500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1000000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 987500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 1000000 },
{ 0, { 0 } }
};
@ -343,11 +342,11 @@ static struct acpu_level tbl_PVS6_1512MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 975000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 987500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 975000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(14), 987500 },
{ 0, { 0 } }
};
@ -359,13 +358,13 @@ static struct acpu_level tbl_PVS0_1700MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 1000000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 1025000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1037500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1075000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1087500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1125000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1150000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1175000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1225000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(15), 1250000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1075000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1087500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1125000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1150000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1175000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1225000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1250000 },
{ 0, { 0 } }
};
@ -377,13 +376,13 @@ static struct acpu_level tbl_PVS1_1700MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 975000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 1000000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1012500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1037500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1050000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1087500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1112500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1150000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1187500 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(15), 1200000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1037500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1050000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1087500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1112500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1150000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1187500 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1200000 },
{ 0, { 0 } }
};
@ -395,13 +394,13 @@ static struct acpu_level tbl_PVS2_1700MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 937500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 950000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 975000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1000000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1012500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1037500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1075000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1100000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1137500 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(15), 1162500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1000000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1012500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1037500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1075000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1100000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1137500 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1162500 },
{ 0, { 0 } }
};
@ -413,13 +412,13 @@ static struct acpu_level tbl_PVS3_1700MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 900000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 925000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 950000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 975000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 987500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1000000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1037500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1062500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1100000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(15), 1125000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 975000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 987500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1000000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1037500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1062500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1100000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1125000 },
{ 0, { 0 } }
};
@ -431,13 +430,13 @@ static struct acpu_level tbl_PVS4_1700MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 950000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 962500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 975000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1000000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1037500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1075000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(15), 1100000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 950000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 962500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 975000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1000000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1037500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1075000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1100000 },
{ 0, { 0 } }
};
@ -449,13 +448,13 @@ static struct acpu_level tbl_PVS5_1700MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 987500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1012500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1050000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(15), 1075000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 987500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1012500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1050000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1075000 },
{ 0, { 0 } }
};
@ -467,13 +466,13 @@ static struct acpu_level tbl_PVS6_1700MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 975000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1000000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1025000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(15), 1050000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 975000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1000000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1025000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1050000 },
{ 0, { 0 } }
};
@ -485,14 +484,14 @@ static struct acpu_level tbl_PVS0_2000MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 962500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 975000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 1000000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1025000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1037500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1062500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1100000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1125000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1175000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1225000 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1287500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1025000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1037500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1062500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1100000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1125000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1175000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(14), 1225000 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(14), 1287500 },
{ 0, { 0 } }
};
@ -504,14 +503,14 @@ static struct acpu_level tbl_PVS1_2000MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 937500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 950000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 975000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1000000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1012500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1037500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1075000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1100000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1137500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1187500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1250000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1000000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1012500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1037500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1075000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1100000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1137500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(14), 1187500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(14), 1250000 },
{ 0, { 0 } }
};
@ -523,14 +522,14 @@ static struct acpu_level tbl_PVS2_2000MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 912500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 925000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 950000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 975000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 987500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1012500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1050000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1075000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1112500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1162500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1212500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 975000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 987500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1012500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1050000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1075000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1112500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(14), 1162500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(14), 1212500 },
{ 0, { 0 } }
};
@ -542,14 +541,14 @@ static struct acpu_level tbl_PVS3_2000MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 900000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 912500 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 937500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 962500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 975000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1000000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1025000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1050000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1087500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1137500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1175000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 962500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 975000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1000000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1025000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1050000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1087500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(14), 1137500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(14), 1175000 },
{ 0, { 0 } }
};
@ -561,14 +560,14 @@ static struct acpu_level tbl_PVS4_2000MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 950000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 962500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 975000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1000000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1037500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1075000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1112500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1150000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 950000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 962500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 975000 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1000000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1037500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1075000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(14), 1112500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(14), 1150000 },
{ 0, { 0 } }
};
@ -580,14 +579,14 @@ static struct acpu_level tbl_PVS5_2000MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 987500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1012500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1050000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1087500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1125000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 987500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1012500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1050000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(14), 1087500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(14), 1125000 },
{ 0, { 0 } }
};
@ -599,14 +598,14 @@ static struct acpu_level tbl_PVS6_2000MHz[] __initdata = {
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 975000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1000000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1025000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1062500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1100000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 975000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1000000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1025000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(14), 1062500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(14), 1100000 },
{ 0, { 0 } }
};